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GitHub topics: jesd204b
analogdevicesinc/hdl
HDL libraries and projects
Language: Verilog - Size: 34.1 MB - Last synced: 11 days ago - Pushed: 11 days ago - Stars: 1,391 - Forks: 1,465
analogdevicesinc/pyadi-jif
Python interface and configurator for the ADI JESD204 Interface Framework
Language: Python - Size: 2.75 MB - Last synced: 18 days ago - Pushed: 19 days ago - Stars: 8 - Forks: 8
analogdevicesinc/jesd-eye-scan-gtk
JESD204 Eye Scan Visualization Utility
Language: C - Size: 135 KB - Last synced: about 2 months ago - Pushed: 7 months ago - Stars: 12 - Forks: 11
BBN-Q/VHDL-JESD204b
JESD204b modules in VHDL
Language: VHDL - Size: 49.8 KB - Last synced: 2 months ago - Pushed: about 5 years ago - Stars: 26 - Forks: 16
hukenovs/adc_configurator
ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)
Language: VHDL - Size: 17.6 KB - Last synced: 15 days ago - Pushed: almost 6 years ago - Stars: 11 - Forks: 0
LIacob106/hdl Fork of analogdevicesinc/hdl
HDL libraries and projects
Language: Verilog - Size: 17.6 MB - Last synced: 10 months ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0
KindaM3h/SpaceVNXDaughterBoard
JESD204B ADC and DAC SYZYGY Pod.
Size: 26 MB - Last synced: 12 months ago - Pushed: about 2 years ago - Stars: 3 - Forks: 1
KindaM3h/SpaceVNXBaseBoard
SpaceVNX (VITA 74.4) carrier based on Zynq-7000.
Size: 23.8 MB - Last synced: 12 months ago - Pushed: over 1 year ago - Stars: 2 - Forks: 2