GitHub topics: alu-digital-circuit
brown9804/Assembly_MIPS_MARS
Some programs that exemplify different algorithms developed in assembler thinking of a MIPS architecture with the MARS simulator
Language: Assembly - Size: 769 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0
Amirreza81/Computer-Architecture
Computer Architecture - Practical Solution with Quartus - Sharif University of Technology
Language: VHDL - Size: 6.95 MB - Last synced at: 3 months ago - Pushed at: about 1 year ago - Stars: 1 - Forks: 0
AbdelrahmanHamdyy/RISC-Pipelined-Processor Fork of SarahElzayat/RISC-pipelined-processor
5 stages RISC pipelined processor with multiple instructions implemented in verilog including ALU Operations, Interrupts as a state machine, Jumps and branching instructions, Memory operations and more.. following Harvard architecture.
Size: 10.8 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0
yu-niverse/Intro-to-Computer-Organization
【 NYCU 2022 Spring Semester 】by Professor 李毅郎
Language: Verilog - Size: 7.42 MB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
LiamK-Technion/DigSystems_sim1
Digital Systems and Computer Structure, Simulation 1, Spring 2022
Language: SystemVerilog - Size: 1.08 MB - Last synced at: almost 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0
