GitHub topics: design-of-ip-cores-and-ics
angeliaplutus/ipcoredesign
Design & Verification of IP Cores and ICs, Artificial Intelligence
Language: VHDL - Size: 19.1 MB - Last synced at: 10 months ago - Pushed at: 10 months ago - Stars: 1 - Forks: 2
Design & Verification of IP Cores and ICs, Artificial Intelligence
Language: VHDL - Size: 19.1 MB - Last synced at: 10 months ago - Pushed at: 10 months ago - Stars: 1 - Forks: 2