akhil-b-26/parametric-low-power-alu

A configurable Arithmetic Logic Unit (ALU) supporting 12 operations with parameterized data width. Designed with low-power techniques including clock gating and operand isolation. Simulated using Xilinx Vivado WebPACK with waveform verification.

Language: Verilog - Size: 35.2 KB - Last synced at: 17 days ago - Pushed at: 17 days ago - Stars: 0 - Forks: 0