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GitHub topics: signed-unsigned-multiplication

Yellowflash-070/32-bit-Signed-Vedic-Multiplier

A 32-bit Signed Vedic Multiplier created using Verilog HDL utilising Vedic Mathematic Sutras formed using Carry Lookahead Adders as the basic building blocks.

Language: Verilog - Size: 49.8 KB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0

Related Keywords
32-bit-multiplication 1 carry-look-ahead-adder 1 multipliers 1 signed-unsigned-multiplication 1 vedic-mathematics 1 verilog 1 vlsi 1 xilinx-vivado 1