Topic: "ddco"
siri-n-shetty/iverilog
This repository contains a series of Verilog codes for the course UE22CS251A (DDCO).
Language: Verilog - Size: 9.26 MB - Last synced at: 7 months ago - Pushed at: 7 months ago - Stars: 13 - Forks: 5
ParimalaS27/Parallel-Prefix-Adder-8bit-UE19CS206-DDCOLab
This repo consists of the iverilog implementation of a Parallel Prefix adder - 8bit (I/P - O/P). This was done as a part of a project Under UE19CS206 - Digital Design and Computer Organization Laboratory Course at PES University.
Language: Verilog - Size: 497 KB - Last synced at: almost 2 years ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 2
Bhavan-Naik/16bit_shift_adder
Project to Design and Implement a 16-bit Shift Adder (Serial Adder) using Verilog.
Language: Verilog - Size: 10.7 KB - Last synced at: about 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 1
siri-n-shetty/Car-Parking-System-iverilog
Laboratory Mini Project for the Course - Digital Design and Computer Organization (UE22CS251A)
Language: Verilog - Size: 1.35 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
Bhavan-Naik/16bit_barrel_shifter
Project to Design and Implement a 16-bit Barrel Shifter using Verilog.
Language: Verilog - Size: 816 KB - Last synced at: about 1 year ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 2