GitHub / ZeroDashZero / 32-bit-Multiplier-design-using-transistor-level-Digital-Gates

This project was performed on the completion of our B. Tech 4th Semester Summer Training cum Academic Internship Programme on "RISC-V based 32-bit Digital Processor Design using SPICE" under E&ICT Academy IIT Guwahati and Assam Science & Technology University, Guwahati under TEQIP III in association with VLSI Expert

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Topics: 16-bit, 32-bit, cmos, cppsim, digital-circuits, digital-gates, fulladder, logic-gates, multiplier, simulation, spice, transistor-level, vlsi, vlsi-design

• Files
• Readme
• Dependencies