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GitHub topics: transistor-level

goupaz/lowlevel

Design your own CPU, Operating system, and Compiler (Maintainer: Emin Ghuliev)

Size: 472 KB - Last synced at: about 21 hours ago - Pushed at: almost 4 years ago - Stars: 26 - Forks: 3

melchisedech333/transistor-simulator

:fire: This project performs a simulation of N and P-type MOSFET transistors. Next, the creation of logic gates is performed using the simulated transistors. Then, a Half-Adder mechanism is created with the logic gates, to later use it in a binary sum algorithm.

Language: C - Size: 376 KB - Last synced at: 10 days ago - Pushed at: over 2 years ago - Stars: 11 - Forks: 4

bufferedName/ZSpice

A RTL Synthesizer that can convert Verilog HDL into transistor-level netliest which can be simulated by Spice

Language: Perl - Size: 21.2 MB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 8 - Forks: 0

shawntsai0312/NTUEE_ICDESIGN_23FALL_HW2

NTUEE IC Design 23Fall HW2

Language: Shell - Size: 6.19 MB - Last synced at: 11 months ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

komed3/8-bit-alu

Project to build an 8-bit arithmetic logic unit (ALU) consisting only of transistors.

Size: 13.1 MB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 6 - Forks: 2

ZeroDashZero/32-bit-Multiplier-design-using-transistor-level-Digital-Gates

This project was performed on the completion of our B. Tech 4th Semester Summer Training cum Academic Internship Programme on "RISC-V based 32-bit Digital Processor Design using SPICE" under E&ICT Academy IIT Guwahati and Assam Science & Technology University, Guwahati under TEQIP III in association with VLSI Expert

Size: 6.57 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 2 - Forks: 5