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GitHub / midimaster21b / rtl-core-library
A set of common RTL cores that I've developed over time and organized into a FuseSoC library.
JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/midimaster21b%2Frtl-core-library
Stars: 2
Forks: 0
Open Issues: 0
License: None
Language:
Repo Size: 21.5 KB
Dependencies:
15
Created: over 1 year ago
Updated: over 1 year ago
Last pushed: 3 months ago
Last synced: 3 months ago
Topics: fusesoc, hdl, rtl, systemverilog, verilog, vhdl
Files
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Readme
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Dependencies
requirements.txt
pypi
- Jinja2 ==3.1.2
- MarkupSafe ==2.1.1
- PyYAML ==6.0
- attrs ==22.1.0
- distro ==1.8.0
- edalize ==0.4.0
- fusesoc ==1.12.0
- ipyxact ==0.3.2
- jsonschema ==4.16.0
- okonomiyaki ==1.3.2
- pyparsing ==3.0.9
- pyrsistent ==0.18.1
- simplesat ==0.8.2
- six ==1.16.0
- zipfile2 ==0.0.12