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GitHub / raleighlittles / Applied_Digital_Logic_Exercises_Using_FPGAs
Selected projects from "Applied Digital Logic Exercises using FPGAs", by Kurt Wick.
Stars: 8
Forks: 1
Open Issues: 0
License: None
Language: Verilog
Repo Size: 13.2 MB
Dependencies: pending
Created: over 5 years ago
Updated: about 1 month ago
Last pushed: over 2 years ago
Last synced: about 1 month ago
Topics: applied-digital-logic-exercises, artix-7, basys3, fpga, hdl, microblaze-mcs, verilog, vivado
Funding links: https://github.com/sponsors/raleighlittles
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