GitHub topics: cse460project
Agrifinliberty/VLSI-DESIGN-CSE460-BRACU
VLSI-DESIGN-CSE460-BRACU focuses on advanced VLSI design concepts for CSE460 at BRACU. This repository includes course materials, project examples, and resources to enhance your understanding of VLSI design. 🖥️📁
Language: Scheme - Size: 8 MB - Last synced at: 5 days ago - Pushed at: 5 days ago - Stars: 0 - Forks: 0

AnonXarkA/VLSI-DESIGN-CSE460-BRACU
Language: Scheme - Size: 8 MB - Last synced at: 8 days ago - Pushed at: 8 days ago - Stars: 0 - Forks: 0

Inmoresentum/CSE460GroupProject
Contains CSE460 Group Project Verilog code.
Language: Verilog - Size: 24.4 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
