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GitHub topics: mips-pipeline

yasnakateb/PipelinedMIPS

🔮 A 16-bit MIPS Processor Implementation in Verilog HDL

Language: Verilog - Size: 75.2 KB - Last synced at: 3 months ago - Pushed at: almost 5 years ago - Stars: 5 - Forks: 0

nizarmah/mipsim 📦

A Basic MIPS Simulator

Language: Java - Size: 44.9 KB - Last synced at: over 2 years ago - Pushed at: about 6 years ago - Stars: 3 - Forks: 0

Related Keywords
mips-pipeline 2 cpu 1 icarus-verilog 1 iverilog 1 mips 1 mips-processor 1 pipeline 1 verilog 1 verilog-hdl 1 alu 1 assembler 1 mips-simulator 1 stage 1