Pratim-Senapati/qflow-projects

A complete setup for Qflow, an open-source digital VLSI design flow. This repo provides pre-configured example projects, automated installation scripts, and step-by-step instructions to synthesize, place, and route Verilog designs into GDSII layouts. Supports both running example designs and using your own Verilog.

Language: Python - Size: 7.85 MB - Last synced at: 14 days ago - Pushed at: 14 days ago - Stars: 0 - Forks: 0