GitHub topics: magic-vlsi
Pratim-Senapati/qflow-projects
A complete setup for Qflow, an open-source digital VLSI design flow. This repo provides pre-configured example projects, automated installation scripts, and step-by-step instructions to synthesize, place, and route Verilog designs into GDSII layouts. Supports both running example designs and using your own Verilog.
Language: Python - Size: 7.85 MB - Last synced at: 12 days ago - Pushed at: 12 days ago - Stars: 0 - Forks: 0
nelzeg/stdcell-library
A 12-track height standard cell library built in SKY130 PDK. The cells were designed using Magic VLSI Layout Tool and characterized using Digital Standard Cell Characterizer (DSCC).
Language: Python - Size: 9.44 MB - Last synced at: about 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
junior-jl/cs-amp-sky130
Design of a common source amplifier using Skywater sky130 technology
Size: 3.08 MB - Last synced at: about 1 year ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0
adithi-su/VLSI-Implementation-of-4x4-Wallace-Tree-Multiplier
layout for 4x4 Wallace tree multiplier using MAGIC
Size: 136 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0
