Topic: "risc-v-pipeline"
muhammadtalhasami/RV32I_Single_Cycle
This repository contains an implementation of a RV32I fetch pipeline microprocessor. The RV32I is a 32-bit RISC-V instruction set architecture, with the 'I' extension indicating the base integer instructions.
Language: Verilog - Size: 168 KB - Last synced at: 2 months ago - Pushed at: 9 months ago - Stars: 3 - Forks: 0
Related Topics
fetch-stage-pipeline
1
gtkwave
1
hardware-designs
1
muhammadtalhasami-github-
1
pipeline-processor
1
risc-v-assembly
1
risc-v-processor
1
risc-v-processor-images
1
rv32i
1
rv32i-processor
1
single-cycle-processor
1
single-cycle-processor-gtkwave-image
1
system-verilog
1
system-verilog-codes
1
verilator
1
verilog
1
verilog-code-examples
1
verilog-codes
1
vhdl
1