Topic: "soc-fpga"
WangXuan95/Zynq-Tutorial
使用 Vivado+PetaLinux 为 Xilinx Zynq7 搭建 Linux 系统 —— 以 Zedboard 为例
Language: C - Size: 49.4 MB - Last synced at: 10 months ago - Pushed at: over 1 year ago - Stars: 80 - Forks: 14

robseb/HPS2FPGAmapping
SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)
Language: Verilog - Size: 11 MB - Last synced at: 17 days ago - Pushed at: almost 4 years ago - Stars: 37 - Forks: 13

robseb/meta-intelfpga
Yocto Project BSP meta-layer for Intel (ALTERA) SoC-FPGAs (SoCFPGA) - with step by step guide
Language: BitBake - Size: 600 KB - Last synced at: 22 days ago - Pushed at: 11 months ago - Stars: 21 - Forks: 8

robseb/Django2FPGAdemo
Demonstration how to build a Management Web interface to interact with the FPGA fabric and change the FPGA configuration with the Django Framework
Language: Python - Size: 2.38 MB - Last synced at: 17 days ago - Pushed at: almost 4 years ago - Stars: 12 - Forks: 5

NekoSilverFox/ZYNQ
⚙️ 基于 Zynq-7 全可编程 SoC 的设计
Language: HTML - Size: 499 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 8 - Forks: 7

robseb/LinuxVSCppFPGA
C++ examples for accessing FPGA Soft-IP and Hard-IP with embedded Linux for Intel (ALTERA) SoC-FPGAs (Cyclone V)
Language: C - Size: 70 MB - Last synced at: 17 days ago - Pushed at: almost 4 years ago - Stars: 7 - Forks: 1

robseb/NIOSII_EclipseCompProject
Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...
Language: C - Size: 5.02 MB - Last synced at: 17 days ago - Pushed at: almost 4 years ago - Stars: 6 - Forks: 3

raetro/raetro_system_u-boot
Rætro U-Boot Bootloader
Language: C - Size: 17.6 MB - Last synced at: almost 2 years ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0
