GitHub / Nic30 / hdlConvertor
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Nic30%2FhdlConvertor
PURL: pkg:github/Nic30/hdlConvertor
Stars: 298
Forks: 75
Open issues: 33
License: mit
Language: C++
Size: 14.5 MB
Dependencies parsed at: Pending
Created at: about 9 years ago
Updated at: 29 days ago
Pushed at: 29 days ago
Last synced at: 29 days ago
Commit Stats
Commits: 1601
Authors: 26
Mean commits per author: 61.58
Development Distribution Score: 0.146
More commit stats: https://commits.ecosyste.ms/hosts/GitHub/repositories/Nic30/hdlConvertor
Topics: antrl4, fpga, parser, python, systemverilog, systemverilog-parser, verilog, verilog-parser, vhdl, vhdl-parser