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GitHub / Nic30 / hwt
VHDL/Verilog/SystemC code generator, simulator API written in python/c++
JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Nic30%2Fhwt
Stars: 193
Forks: 26
Open Issues: 10
License: mit
Language: Python
Repo Size: 19 MB
Dependencies:
10
Created: almost 9 years ago
Updated: 3 days ago
Last pushed: 3 days ago
Last synced: 2 days ago
Commit Stats
Commits: 3006
Authors: 12
Mean commits per author: 250.5
Development Distribution Score: 0.084
More commit stats: https://commits.ecosyste.ms/hosts/GitHub/repositories/Nic30/hwt
Topics: codegen, codegenerator, compiler, fpga, hcl, hls, rtl, simulator, systemc, systemverilog, uvm, verilog, vhdl
Files
Dependencies
- hdlConvertorAst master
- hwtSimApi master
- ipCorePackager master
- pyDigitalWaveTools master
- pyMathBitPrecise master
- hdlConvertorAst >=1.0
- hwtSimApi >=1.3
- ipCorePackager >=0.6
- pyDigitalWaveTools >=1.1