Ecosyste.ms: Repos

An open API service providing repository metadata for many open source software ecosystems.

GitHub / pConst / basic_verilog

Must-have verilog systemverilog modules

JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/pConst%2Fbasic_verilog

Stars: 1,456
Forks: 340
Open Issues: 0

License: None
Language: Verilog
Repo Size: 54.2 MB
Dependencies: 0

Created: over 8 years ago
Updated: 10 days ago
Last pushed: 10 days ago
Last synced: 10 days ago

Topics: altera, debounce, delay, encoder, fifo, fpga, hls, pwm, spi-interface, spi-master, synchronizer, tcl, uart, uart-controller, uart-protocol, uart-receiver, uart-tx, uart-verilog, verilog, xilinx

Files
    Loading...
    Readme
    Loading...

    No dependencies found