aasthaasb/Parkingslot-manager

Implementing a parking slot system usingRTL Coding, the PYNQ Z2 board, seven-segment display, wires, and a breadboard.

Language: Tcl - Size: 322 KB - Last synced at: 12 months ago - Pushed at: 12 months ago - Stars: 0 - Forks: 0

787533732/APB_SPI_Master

Language: Verilog - Size: 16.3 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

Nagisanopan/USTC_2022Fall_DigitalCircuit_Lab

USTC 2022秋季学期 数字电路实验报告

Size: 22.9 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

krz-max/Digital-Circuits-and-Systems

[NYCU 2021 Spring] Digital Circuits and Systems

Language: SystemVerilog - Size: 10.5 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 2 - Forks: 0

GeetikaTP/100DaysofRTL

The Verilog Codes for various circuits are implemented in Quartus Prime.

Language: Verilog - Size: 1.31 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

eimtechnology/STEPFPGA-MXO2Core

The codes accompanied with STEPFPGA tutorial book

Language: Verilog - Size: 3.12 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 22 - Forks: 4

IamFlea/AdderCircuitGenerator

This script generates and analyzes prefix tree adders.

Language: Python - Size: 30.3 KB - Last synced at: about 2 years ago - Pushed at: about 4 years ago - Stars: 28 - Forks: 4

SHESHANKSK/15EEEP203_DC_LAB_STRUCTURE_ENQUIRY

DC Lab

Language: Alloy - Size: 4.06 MB - Last synced at: about 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

ujjawalece/Implementation-of-Linked-List-and-Binary-Tree-using-Digital-Circuit

Language: Python - Size: 1.63 MB - Last synced at: 3 months ago - Pushed at: almost 4 years ago - Stars: 1 - Forks: 0