GitHub topics: harvard-architecture
PacoReinaCampo/PU-OR1K
Processing Unit with OpenRISC-32 / OpenRISC-64
Language: SystemVerilog - Size: 32.3 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 2 - Forks: 1
PacoReinaCampo/PU-RISCV
Processing Unit with RISCV-32 / RISCV-64 / RISCV-128
Language: Shell - Size: 59.9 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 19 - Forks: 7
edson-acordi/4bit-microcomputer
MikroLeo project files (schematic, PCB, assembler, emulator/debugger, circuit simulation file, documentation, example of programs etc). MikroLeo is a 4-bit microcomputer developed mainly for educational purposes and distributed for free under open-source licenses.
Language: Python - Size: 16.3 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 64 - Forks: 4
Hazrat-Ali9/Harvard-University-Artificial-Intelligence-With-Python
🚞 Harvard University's CS50 🚁 AI with Python 🛩 developers and 🎍 enthusiasts 🚤 ready to 🎿 explore the 🚢 world of 🏉 intelligent systems 🚐 using Python algorithms 🏩 knowledge representation logic 🎳 machine learning self 🏈 paced learning academic 🧶 enrichment and AI portfolio building 🪀problem sets project ⚽ walkthroughs and detailed
Language: Jupyter Notebook - Size: 51.8 KB - Last synced at: 2 months ago - Pushed at: 2 months ago - Stars: 1 - Forks: 0
WinstonLiyt/mipsCpu89
MIPS32-based Cpu89 in verilog for Course 10022502 Project
Language: VHDL - Size: 36.2 MB - Last synced at: 3 months ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0
icarogabryel/moon-iv
16 Bit, multicore, unicycle processor for general purpose simulated in VHDL. Created as a tool for teaching computer architecture at Federal University of Piauí.
Language: VHDL - Size: 3.6 MB - Last synced at: 3 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0
GabrielGiurgica/8-bit-MIPS-Processor
A Verilog implementation of an 8-bit MIPS processor
Language: Verilog - Size: 589 KB - Last synced at: 11 months ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0
simon-gardier/cpu-design
📟 32 bits CPU design
Language: Python - Size: 6.1 MB - Last synced at: 3 months ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 1
gabrielpalassi/PoliLEG
Implementação VHDL de um processador de ciclo único com suporte a um subconjunto de instruções ARMv8.
Language: VHDL - Size: 5.71 MB - Last synced at: 3 months ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0
alextsagkas/ARM-multicycle-processor
Implementing a subset of ARM instruction set architecture in a multicycle microarchitecture using Xilinx Vivado IDE. The computer architecture followed is Harvard (separate data and instruction memory).
Language: VHDL - Size: 5.58 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0
ksluck/sl-dnhc
An simple implementation of the Differentiable Neural Harvard Computer
Language: Python - Size: 3.73 MB - Last synced at: over 1 year ago - Pushed at: about 5 years ago - Stars: 3 - Forks: 0
Mehrdadghassabi/Dosage_cpu Fork of ZahraAbtahi/Dosage-Cpu
dosage is a 20bit single cycle RISC cpu based on harvard architecture
Language: Python - Size: 1.2 MB - Last synced at: over 2 years ago - Pushed at: about 3 years ago - Stars: 2 - Forks: 0
