cpld | Topic | Ecosyste.ms: Repos

Topic: "cpld"

wagiminator/Development-Boards

Collection of various development boards for microcontrollers (e.g., CH55x, CH32, PY32, STC8, STM32) and accompanying example software.

Language: C - Size: 41.8 MB - Last synced at: 11 days ago - Pushed at: 4 months ago - Stars: 188 - Forks: 29

furrtek/SiliconRE

Traces, schematics, and general infos about custom chips reverse-engineered from silicon

Language: Verilog - Size: 464 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 170 - Forks: 14

UzixLS/zx-sizif-512

ZX Spectrum CPLD-based clone for rubber case

Language: KiCad Layout - Size: 25.4 MB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 160 - Forks: 22

peterzieba/5Vpld

A collection of scripts and tools for Atmel ATF150x and GAL Programmable logic devices, some of the only standing active 5V programmable logic parts still available.

Language: Python - Size: 8 MB - Last synced at: about 18 hours ago - Pushed at: about 18 hours ago - Stars: 94 - Forks: 11

furrtek/VirtualTap

Mod kit for the Virtual Boy to make it output VGA or RGB video

Language: Verilog - Size: 2.75 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 52 - Forks: 10

PR77/A500_ACCEL_RAM_IDE-Rev-2

Improved design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface

Language: Verilog - Size: 5.87 MB - Last synced at: 8 months ago - Pushed at: 8 months ago - Stars: 49 - Forks: 5

mikeroyal/CPLD-Guide

Complex Programmable Logic Device (CPLD) Guide

Language: Verilog - Size: 134 KB - Last synced at: 9 days ago - Pushed at: over 3 years ago - Stars: 45 - Forks: 3

neogeodev/NeoChips

Replacement "chips" for NeoGeo systems

Language: Verilog - Size: 986 KB - Last synced at: 29 days ago - Pushed at: 29 days ago - Stars: 36 - Forks: 9

PR77/68000_Relocator_FLASH_Kickstart

68000 Relocator with FLASH Kickstart

Language: C - Size: 5.62 MB - Last synced at: over 1 year ago - Pushed at: about 2 years ago - Stars: 29 - Forks: 7

dilshan/max2-audio-dac

24-bit Stereo Audio DAC for Raspberry Pi

Language: Verilog - Size: 366 KB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 26 - Forks: 7

UzixLS/zx-multisound

ZX Spectrum soundcard for NEMOBUS/ZXBUS

Language: KiCad Layout - Size: 7.04 MB - Last synced at: 22 days ago - Pushed at: 22 days ago - Stars: 25 - Forks: 14

andykarpov/karabas-128

Karabas-128. ZX Spectrum 128k clone, based on CPLD Altera EPM7128STC100

Language: VHDL - Size: 21.7 MB - Last synced at: 11 months ago - Pushed at: 11 months ago - Stars: 25 - Forks: 3

PR77/A600_ACCEL_RAM

Amiga 600 Accelerator And RAM Expansion

Language: C - Size: 2.37 MB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 23 - Forks: 1

leonow32/verilog-fpga

Many peripherals in Verilog ready to use

Language: Verilog - Size: 4.89 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 22 - Forks: 3

Gekkio/docker-fpga

Dockerized FPGA toolchain experiments

Language: Shell - Size: 22.5 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 21 - Forks: 5

neogeodev/FusionConverter

Design files for the open-hardware NeoGeo MVS to AES converter

Language: Verilog - Size: 799 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 20 - Forks: 9

konkotgit/ZX-48-Spider

ZX Spectrum 48 modern cpld based clone.

Size: 1.1 MB - Last synced at: 12 months ago - Pushed at: 12 months ago - Stars: 20 - Forks: 4

dsm/USB-Blaster_CH552

USB-Blaster firmware that runs on cheap with CH552G chip

Language: C - Size: 71.3 KB - Last synced at: about 22 hours ago - Pushed at: 3 months ago - Stars: 17 - Forks: 1

whitequark/ATF15xx-EVB

Cheap & simple evaluation boards for Microchip ATF15xx CPLDs

Size: 2.36 MB - Last synced at: 3 days ago - Pushed at: about 1 year ago - Stars: 17 - Forks: 5

wschutzer/xsvfduino

An Arduino as an XSVF player to program CPLD's and FPGA's

Language: C++ - Size: 1.49 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 17 - Forks: 8

obiwanjacobi/Zalt

Zalt is a home brew Z80 computer with a modern(isch) chipset.

Language: C - Size: 94.2 MB - Last synced at: 7 months ago - Pushed at: 7 months ago - Stars: 14 - Forks: 3

UzixLS/zx-sizif-128

Easy-to-build minimalistic ZX Spectrum clone

Language: KiCad Layout - Size: 13.9 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 13 - Forks: 3

ytmytm/plus4-tcbm2sd

CBM 1551 paddle replacement / mass storage using an SD card interfacing with the Commodore C16/116/Plus4 simulating a TCBM bus 1551 disk drive

Language: Assembly - Size: 20.1 MB - Last synced at: 11 days ago - Pushed at: 11 days ago - Stars: 11 - Forks: 1

PR77/A500_ACCEL_RAM_IDE-Rev-1

Initial design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface

Language: Verilog - Size: 5.5 MB - Last synced at: over 1 year ago - Pushed at: about 7 years ago - Stars: 11 - Forks: 2

anuejn/XC9500

WIP open source tooling for the XC9500 / XC9500XL series of CPLDs from Xilinx.

Language: Python - Size: 1.6 MB - Last synced at: 7 days ago - Pushed at: over 3 years ago - Stars: 10 - Forks: 3

pdsmart/tzpuFusionX

tranZPUter FusionX - Software based physical Z80 replacement using a Linux System-on-a-module and a highly accurate Z80 Emulation written in C.

Language: C - Size: 1.63 GB - Last synced at: 6 days ago - Pushed at: almost 2 years ago - Stars: 9 - Forks: 2

UzixLS/zx-sizif-512-ext

Extension board for Sizif-512

Language: KiCad Layout - Size: 6.46 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 8 - Forks: 2

briansune/max-II-cpld-sdram-tft-driver

Language: C - Size: 13.3 MB - Last synced at: about 2 years ago - Pushed at: almost 3 years ago - Stars: 8 - Forks: 0

Cellgalvano/vhdl_rgbmatrix_driver

A simple driver for RGB Led Panels of different sizes

Language: C++ - Size: 257 KB - Last synced at: over 1 year ago - Pushed at: about 5 years ago - Stars: 8 - Forks: 3

susam/mano-cpu

My bachelor's degree final year project: A CPLD implementation of a 16-bit microprocessor I learnt from Computer System Architecture by M. Morris Mano

Language: VHDL - Size: 9.53 MB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 7 - Forks: 3

tomstorey/vga_crtc

A simple text-mode VGA CRTC implemented in Verilog

Language: Verilog - Size: 40 KB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 6 - Forks: 0

elsevierlabs-os/cpld-viewer

The CP/LD viewer is a Visual Studio Code extension that allows you to view and browse CP/LD compliant documents inside VSCode.

Language: JavaScript - Size: 2.86 MB - Last synced at: about 1 year ago - Pushed at: almost 2 years ago - Stars: 5 - Forks: 0

bcrist/re4k

Fusemaps for Lattice ispMach4000 CPLDs

Language: Zig - Size: 8.25 MB - Last synced at: 18 days ago - Pushed at: 28 days ago - Stars: 4 - Forks: 2

SoCXin/AG32VF407

L3 R3: AGM RISC-V +CPLD/FPGA MCU (AG32VH407/AG32VF407/AG32VF303)

Language: xBase - Size: 29.2 MB - Last synced at: 12 days ago - Pushed at: 6 months ago - Stars: 4 - Forks: 0

PR77/A520_ACCEL_RAM_IDE

Amiga 500 in socket 68020 Accelerator, FastRAM and IDE Interface

Size: 153 KB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 4 - Forks: 1

pdsmart/MZ80A_80COLOUR

A Sharp MZ80A Video upgrade. v1.0 allows switchable 40/80 column display with colour monitor output, v2.0 provides full pixel graphics compatible with the MZ80B.

Language: VHDL - Size: 23.7 MB - Last synced at: 24 days ago - Pushed at: over 2 years ago - Stars: 4 - Forks: 2

PreyMa/ScreenBuffer

LED Wall Screen Buffer and Panel Management Controller in VHDL

Language: VHDL - Size: 126 KB - Last synced at: 12 months ago - Pushed at: over 6 years ago - Stars: 4 - Forks: 0

mcleod-ideafix/spi_master

A SPI master interface core for CPLD/FPGA

Language: Verilog - Size: 20.5 KB - Last synced at: almost 2 years ago - Pushed at: over 6 years ago - Stars: 4 - Forks: 0

lowfatcomputing/forth-psoc-utils

utils for PSoC RE

Language: Forth - Size: 64.5 KB - Last synced at: about 2 years ago - Pushed at: over 7 years ago - Stars: 4 - Forks: 0

podonoghue/CPLD_Breakout

Breakout board for XC2C64A-7VQG44C CPLD

Language: HTML - Size: 26.4 MB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 3 - Forks: 2

hotkeysoft/xc9536xlBreakout-kicad

Breakout Board for XC9536XL CPLD

Size: 1.35 MB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 3 - Forks: 0

rubinsteina13/SV_I2S_RX_CORE

Synthesizable SystemVerilog IP-Core of the I2S Receiver

Language: SystemVerilog - Size: 83 KB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 3 - Forks: 2

aelfimow/frequency-counter-2

Frequency counter implemented with CPLD EPM3064 only and HDSP-2113 display

Language: VHDL - Size: 1.64 MB - Last synced at: almost 2 years ago - Pushed at: over 7 years ago - Stars: 3 - Forks: 0

AndrejChoo/CPLDCtrum

ZX Spectrum clone on CPLD

Size: 12 MB - Last synced at: 21 days ago - Pushed at: 6 months ago - Stars: 2 - Forks: 0

OS-Q/platform-agm32

platform agm32rv

Language: Python - Size: 2.64 MB - Last synced at: 19 days ago - Pushed at: about 1 year ago - Stars: 2 - Forks: 2

podonoghue/DigitalLabBoard

Digital Board for Undergraduate Laboratory

Language: C++ - Size: 417 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 2 - Forks: 1

jlywxy/rgb-lcd-lg-cpld

Driving parallel RGB LCD (LG Display LD050WV1-SP01) using CPLD

Language: Verilog - Size: 17.6 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 2 - Forks: 0

quartiq/urukul

CPLD gateware for the Sinara Urukul module

Language: Python - Size: 59.6 KB - Last synced at: about 7 hours ago - Pushed at: over 3 years ago - Stars: 2 - Forks: 11

rubinsteina13/SV_CLARKE_TRANSFORMATION_CORES

Synthesizable SystemVerilog IP-Cores of the Forward and Backward Clarke Transformation

Language: SystemVerilog - Size: 24.4 KB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 2 - Forks: 0

rubinsteina13/SV_DSM_CORE

Synthesizable SystemVerilog IP-Core of the First-Order Delta-Sigma Modulator

Language: SystemVerilog - Size: 50.8 KB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 2 - Forks: 1

andrsmllr/crappy_max_ii_devbrd

Play and learn some valuable lessons with a generic Ebay/China CPLD board featuring an Altera/Intel MAX II CPLD. The hardware is pretty crappy (just mine?) so it won't be much fun.

Language: Verilog - Size: 4.88 KB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 2 - Forks: 0

JonathSpirit/ALUminium

ALUminium is a CPLD/FPGA code for a 8bits arithmetic–logic unit, made for processor like GP8B

Language: HTML - Size: 3.19 MB - Last synced at: about 2 months ago - Pushed at: 8 months ago - Stars: 1 - Forks: 0

pdsmart/tzpuFusion

tranZPUter Fusion - Evolution of the tranZPUter concept, increasing functionality to extend the ZPU Z80, Memory, Video and Audio for Z80 Host systems.

Size: 13.7 KB - Last synced at: 24 days ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

BongPeav/Proteus-PCB-Design-files

this repository contains some PCB design files made in Proteus VSM. I use them here to support my blogs.

Size: 34.8 MB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

MKme/fpga

FPGA and CPLD programming, tutorials and information I figure out.

Language: VHDL - Size: 4.37 MB - Last synced at: 12 months ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

platunus/i2s_ns0921

Clock divider of Raspberry Pi's I2S for Altera CPLD MAX II

Size: 63.5 KB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 0

snwjas/DE2-6bit-CPU

6位简易处理器的硬件设计，使用VHDL语言开发，在DE2-115开发板上运行通过。

Language: VHDL - Size: 2.89 MB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 1 - Forks: 0

dmhl/max7219

MAX7219 7-segment 8-digit LED driver for FPGA/CPLD written in VHDL with cascade connected modules support

Language: VHDL - Size: 914 KB - Last synced at: almost 2 years ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0

ellisgl/addressable-debouncer-verilog

Addressable 8 SPDT debouncer in Verilog

Language: Verilog - Size: 15.6 KB - Last synced at: about 1 month ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 0

hyiger/ram_rom_brd

RAM and ROM board expansion for the MAXV DeltaBrd

Language: VHDL - Size: 5.82 MB - Last synced at: almost 2 years ago - Pushed at: over 5 years ago - Stars: 1 - Forks: 0

meurissemax/elen0040-1 📦

A small game written in VHDL implemented on a CPLD.

Language: VHDL - Size: 3.91 KB - Last synced at: about 2 years ago - Pushed at: about 6 years ago - Stars: 1 - Forks: 1