Topic: "spinalhdl"
SpinalHDL/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
Language: Assembly - Size: 12.7 MB - Last synced at: 2 months ago - Pushed at: 3 months ago - Stars: 2,775 - Forks: 446
19801201/SpinalHDL_CNN_Accelerator
CNN accelerator implemented with Spinal HDL
Language: Scala - Size: 2.25 MB - Last synced at: 3 months ago - Pushed at: over 1 year ago - Stars: 148 - Forks: 37
volatile-static/Keyboard
客制化机械键盘——从0开始全套资料
Language: C - Size: 345 MB - Last synced at: 3 months ago - Pushed at: almost 2 years ago - Stars: 92 - Forks: 17
mit-han-lab/spatten
[HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning
Language: Scala - Size: 1.98 MB - Last synced at: 3 months ago - Pushed at: 11 months ago - Stars: 86 - Forks: 10
SteffenReith/J1Sc
A reimplementation of a tiny stack CPU
Language: Scala - Size: 18.2 MB - Last synced at: about 1 year ago - Pushed at: over 1 year ago - Stars: 77 - Forks: 7
WukLab/Clio
Clio, ASPLOS'22.
Language: C - Size: 289 MB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 66 - Forks: 7
19801201/DOSLAM
An High-Performance SLAM Hardware Accelerator Implementation for FPGA
Language: Scala - Size: 2.54 MB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 61 - Forks: 11
proteus-core/proteus
The SpinalHDL design of the Proteus core, an extensible RISC-V core.
Language: Scala - Size: 1.6 MB - Last synced at: 19 days ago - Pushed at: 19 days ago - Stars: 54 - Forks: 11
SpinalHDL/SpinalCrypto
SpinalHDL - Cryptography libraries
Language: Scala - Size: 492 KB - Last synced at: 3 months ago - Pushed at: about 1 year ago - Stars: 53 - Forks: 19
agra-uni-bremen/microrv32
SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype
Language: Scala - Size: 6.96 MB - Last synced at: 4 months ago - Pushed at: 9 months ago - Stars: 45 - Forks: 6
wel97459/FPGACosmacELF
A re-creation of a Cosmac ELF computer, Coded in SpinalHDL
Language: VHDL - Size: 9.16 MB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 31 - Forks: 5
jiegec/fpu-wrappers
Wrappers for open source FPU hardware implementations.
Language: Verilog - Size: 2.3 MB - Last synced at: 4 months ago - Pushed at: over 1 year ago - Stars: 30 - Forks: 4
thuCGRA/SpinalHDL_Chinese_Doc
Translated SpinalHDL-Doc(v1.7.2) into Chinese
Language: HTML - Size: 8.55 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 30 - Forks: 4
SpinalHDL/SpinalDoc-RTD
The sources of the online SpinalHDL doc
Language: Python - Size: 1.19 GB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 29 - Forks: 63
GuzTech/shdl6800
shdl6800: A 6800 processor written in SpinalHDL
Language: Scala - Size: 114 KB - Last synced at: about 1 year ago - Pushed at: over 5 years ago - Stars: 24 - Forks: 2
plex1/SpinalDev
Docker Development Environment for SpinalHDL
Language: Dockerfile - Size: 33.2 KB - Last synced at: 12 months ago - Pushed at: 12 months ago - Stars: 18 - Forks: 2
liuwei9/SpinalHDL_CNN_Accelerator
CNN accelerator implemented with Spinal HDL
Language: Scala - Size: 2.18 MB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 17 - Forks: 2
ThorKn/J1-forth
Forth for the J1-CPU
Language: Forth - Size: 363 KB - Last synced at: about 2 years ago - Pushed at: over 8 years ago - Stars: 16 - Forks: 1
NOP-Processor/NOP-Core
High performace LA32R out-of-order processor core. (NSCSCC 2023 特等奖)
Language: Scala - Size: 21 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 13 - Forks: 0
fayalalebrun/awesome-spinalhdl
List of SpinalHDL projects, libraries, and learning resources.
Size: 17.6 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 12 - Forks: 1
D0ot/glec2
A classic 5-stage rv32i(incomplete) toy implementation based on powerful SpinalHDL
Language: Scala - Size: 209 KB - Last synced at: about 2 years ago - Pushed at: about 4 years ago - Stars: 10 - Forks: 0
jiegec/EspinalLib
Reusable small hardware components for SpinalHDL
Language: Scala - Size: 96.7 KB - Last synced at: 3 months ago - Pushed at: over 2 years ago - Stars: 9 - Forks: 1
voldemoriarty/Matmul
Matrix Multiplication in Hardware
Language: C - Size: 40.7 MB - Last synced at: almost 2 years ago - Pushed at: about 5 years ago - Stars: 9 - Forks: 3
zhutmost/spinalhdl-template 📦
Mill template for beginning your SpinalHDL project
Language: Scala - Size: 58.6 KB - Last synced at: about 1 year ago - Pushed at: about 2 years ago - Stars: 8 - Forks: 0
volatile-static/SpinalVS
Visual Simulation for SpinalHDL
Language: Scala - Size: 36.1 KB - Last synced at: 3 months ago - Pushed at: about 3 years ago - Stars: 7 - Forks: 0
jens-na/VexRiscv-CCOPI
Custom Coprocessor Interface for VexRiscv
Language: C++ - Size: 519 KB - Last synced at: over 2 years ago - Pushed at: almost 7 years ago - Stars: 7 - Forks: 4
fl4shk/flare_cpu
A 32-bit CPU being developed in SpinalHDL
Language: Scala - Size: 3.19 MB - Last synced at: 6 months ago - Pushed at: 6 months ago - Stars: 6 - Forks: 0
jens-na/spinalhdl-sidechannel
A collection of side-channel hardening extensions for the hardware description language SpinalHDL
Language: Scala - Size: 57.6 KB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 6 - Forks: 1
SpinalHDL/SpinalTemplateGradle
A basic SpinalHDL project, configured with Gradle instead of SBT
Language: Scala - Size: 99.6 KB - Last synced at: 4 months ago - Pushed at: about 2 years ago - Stars: 4 - Forks: 3
voldemoriarty/fpga-mprams
FPGA friendly Multiport memories (N-read-M-write) based on LVT
Language: Scala - Size: 13.7 KB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 4 - Forks: 0
forestfoxx/awesome-hardware-fuzzing
A curated list of research and repositories on the novel technique of hardware fuzzing
Size: 85 KB - Last synced at: 11 days ago - Pushed at: about 1 month ago - Stars: 3 - Forks: 1
Ncerzzk/FPGA-PWM
A fpga based pwm module.(support I2C and SPI protocol)
Language: HTML - Size: 1.57 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 3 - Forks: 3
roby2014/ecp5-ft232rl-example
Programming a Colorlight 5A-75E board (ECP5 FPGA) with FT232RL (via JTAG) using VHDL/Verilog/SpinalHDL and open source tools.
Language: Makefile - Size: 11.7 KB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 1
0xtaruhi/Whackamole
whackamole game written in SpinalHDL
Language: Scala - Size: 421 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
