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GitHub / melchisedech333 / verilog-experiments

:space_invader: My studies with Verilog and notions of digital systems.

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Stars: 1
Forks: 0
Open issues: 0

License: bsd-3-clause
Language: Verilog
Size: 391 KB
Dependencies parsed at: Pending

Created at: over 2 years ago
Updated at: about 2 years ago
Pushed at: over 2 years ago
Last synced at: 26 days ago

Topics: digital-system-design, digital-systems, digital-systems-design, digital-systems-fundamentals, hdl, icarus-verilog, verilog, verilog-code, verilog-examples, verilog-hdl, verilog-project

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