leonlafa/sap1-logisim

A simulation of a Simple-As-Possible (SAP) computer, implemented in Logisim Evolution.

Size: 24.4 KB - Last synced at: 2 days ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

Jayx239/IBM701Emulator

An IBM 701 (Defense Calculator) Emulator

Language: C - Size: 47.9 KB - Last synced at: about 2 years ago - Pushed at: about 8 years ago - Stars: 6 - Forks: 0

Dakshay-S/8-Bit-Processor-in-VHDL

VHDL(Verilog Hardware Description Language) is a programming language using which one can simulate hardware circuits

Language: Verilog - Size: 97.7 KB - Last synced at: over 1 year ago - Pushed at: about 5 years ago - Stars: 1 - Forks: 0

EslamAsHhraf/Pipelined-Processor

🧠 Pipelined Processor is to design, implement and test a Harvard (separate memories for data and instructions), RISC-like, five-stages pipeline processor.

Language: Verilog - Size: 864 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 2 - Forks: 0

Adarsh275/DDCO-LAB-16-Bit-Microprocessor

Language: Verilog - Size: 12.2 MB - Last synced at: about 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

eneskzlcn/Datapath

A Datapath design which able to execute store operation as memory instruction, substraction and or operations as arithmetic instruction by Logisim. Additional explanations in readme.

Size: 73.2 KB - Last synced at: over 2 years ago - Pushed at: about 4 years ago - Stars: 1 - Forks: 0