Topic: "netlists"
VLSIDA/OpenRAM
An open-source static random access memory (SRAM) compiler.
Language: Python - Size: 72 MB - Last synced at: 26 days ago - Pushed at: 2 months ago - Stars: 899 - Forks: 219
byuccl/spydrnet
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
Language: Python - Size: 46 MB - Last synced at: 2 days ago - Pushed at: 4 months ago - Stars: 95 - Forks: 23
f18m/netlist-viewer
SPICE netlist visualizer
Language: C++ - Size: 2.58 MB - Last synced at: 26 days ago - Pushed at: 2 months ago - Stars: 54 - Forks: 6
arasgungore/netlist-solver
A MATLAB project that uses modified nodal analysis to calculate the node voltages of any analog circuit.
Language: MATLAB - Size: 531 KB - Last synced at: about 2 months ago - Pushed at: almost 3 years ago - Stars: 20 - Forks: 3
jvestman/skimibowi
SKiDL Microcontroller Board Wizard
Language: Python - Size: 522 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 5 - Forks: 0
byuccl/spydrnet-tmr
TMR utilities for the SpyDrNet project
Language: Python - Size: 10.7 MB - Last synced at: about 1 year ago - Pushed at: over 1 year ago - Stars: 4 - Forks: 2
Tsubasa0125/Random-Source
This repository, "Random-Source," offers a collection of practical Python tools for various tasks. Explore these scripts to enhance your projects and streamline your workflow. 🐙✨
Language: Python - Size: 12.7 KB - Last synced at: 1 day ago - Pushed at: 1 day ago - Stars: 0 - Forks: 0
paranlee/guarded_unsigned_counter
Counter with two guardians who count each bit either even or odd.
Language: Verilog - Size: 19.5 KB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0
