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GitHub / rggen / rggen

Code generation tool for configuration and status registers

JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/rggen%2Frggen

Stars: 257
Forks: 36
Open Issues: 12

License: mit
Language: Ruby
Repo Size: 497 KB
Dependencies: 13

Created: about 5 years ago
Updated: 4 months ago
Last pushed: 6 months ago
Last synced: 6 months ago

Commit Stats

Commits: 325
Authors: 4
Mean commits per author: 81.25
Development Distribution Score: 0.043
More commit stats: https://commits.ecosyste.ms/hosts/GitHub/repositories/rggen/rggen

Topics: amba, apb, asic, axi, csr, eda, fpga, ral, register-descriptions, rtl, soc, systemverilog, uvm, uvm-ral-model, uvm-register-model, verilog, vhdl, wiki-documents, wishbone-bus

Funding links: https://github.com/sponsors/taichi-ishitani, https://ko-fi.com/taichi730

Files
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    Readme
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    Dependencies
    rggen.gemspec rubygems