GitHub topics: bfm
ubc-3d-vision-lab/NEO-3DF
Language: Jupyter Notebook - Size: 7.12 MB - Last synced at: 5 days ago - Pushed at: over 2 years ago - Stars: 14 - Forks: 3
chili-chips-ba/openPCIE
Peripheral Component Interconnect has taken Express lane long ago, going for xGbps SerDes. Now (for the first time) in opensource on the Host side! Our project roots for Root Complex in 4 ways: 1) openRTL; 2) openBFM with unique sim setup, better performing than vendor TB; 3) openSoftware stack; 4) one-of-the kind openBackplane
Size: 60.9 MB - Last synced at: 1 day ago - Pushed at: 14 days ago - Stars: 11 - Forks: 0
wyvernSemi/pcievhost
PCIe (1.0a to 2.0) Virtual Root Complex model for Verilog, with Endpoint capabilities
Language: C - Size: 3.97 MB - Last synced at: 2 days ago - Pushed at: 14 days ago - Stars: 96 - Forks: 22
Smorodov/nano_bfm
Basel morphable face model mesh and texture generator using GPU.
Language: C - Size: 8.97 MB - Last synced at: about 2 months ago - Pushed at: over 4 years ago - Stars: 13 - Forks: 6
akaeba/eSpiMasterBfm
Bus functional model of an Enhanced Serial Peripheral Interface (eSPI) master
Language: VHDL - Size: 287 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 7 - Forks: 3
grigala/3DMMDepthFitting
Efficient 3D Morphable Model Face Fitting using Depth Sensing Technologies
Language: Scala - Size: 82.3 MB - Last synced at: 10 months ago - Pushed at: about 3 years ago - Stars: 23 - Forks: 8
midimaster21b/spi-bfm
A quick SPI BFM to assist in SPI device testing and development
Language: SystemVerilog - Size: 10.7 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 1
cutipu/HASOKI
HASOKI DDOS TOOL- powerful DDoS toolkit for penetration tests
Language: Python - Size: 232 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 55 - Forks: 30
dg2300/AXI_WB_TB
Basic UVM Testbench to verify AXI stream spec design. Added a wishbone BFM to mimic Wishbone design.
Language: Verilog - Size: 310 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0
TimoBolkart/BFM_to_FLAME
Convert from Basel Face Model (BFM) to the FLAME head model
Language: Python - Size: 7.24 MB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 322 - Forks: 46
ascust/3DMM-Fitting-Pytorch
A 3DMM fitting framework using Pytorch.
Language: Python - Size: 7.54 MB - Last synced at: over 1 year ago - Pushed at: almost 4 years ago - Stars: 496 - Forks: 84
nabeel3133/combining3Dmorphablemodels
Project Page of Combining 3D Morphable Models: A Large scale Face-and-Head Model - [CVPR 2019]
Language: MATLAB - Size: 2.8 MB - Last synced at: over 1 year ago - Pushed at: over 5 years ago - Stars: 83 - Forks: 8
Bemfool/bfm-visual-tool
A Visual Tools of Basel Face Model using Qt5(+built-in OpenGL) and C++
Language: C++ - Size: 992 KB - Last synced at: over 1 year ago - Pushed at: over 5 years ago - Stars: 48 - Forks: 13
Bemfool/BFM-tools
Tools to use Basel Face Model in C++
Language: C++ - Size: 7.43 MB - Last synced at: almost 2 years ago - Pushed at: almost 4 years ago - Stars: 11 - Forks: 3
nabeel3133/3D-texture-fitting
Project Page of Synthesizing Normalized Faces From Facial Identity Features - [CVPR 2017]
Language: Python - Size: 9.34 MB - Last synced at: almost 2 years ago - Pushed at: over 5 years ago - Stars: 33 - Forks: 9
midimaster21b/uart-bfm
A quick UART BFM
Language: SystemVerilog - Size: 2.93 KB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 1
midimaster21b/i2c-bfm
A quick I2C BFM for I2C device testing and development
Language: SystemVerilog - Size: 7.81 KB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 1
midimaster21b/axis-bfm
A simple AXIS BFM
Language: SystemVerilog - Size: 11.7 KB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
vaseegoo/AXI3_VIP
Xillinx AXI Verification IP VLNV:axi_vip1.1@Vivado 2017.4
Language: Verilog - Size: 195 KB - Last synced at: about 2 years ago - Pushed at: almost 7 years ago - Stars: 1 - Forks: 1
vaseegoo/axi_vip
Xillinx AXI Verification IP :axi_vip1.1@Vivado 2017.4
Language: Verilog - Size: 193 KB - Last synced at: about 2 years ago - Pushed at: almost 7 years ago - Stars: 0 - Forks: 1