Topic: "combinational-circuit"
dreylago/logicmin
Logic Minimization in Python
Language: Python - Size: 226 KB - Last synced at: 11 days ago - Pushed at: about 1 year ago - Stars: 24 - Forks: 7
shahsaumya00/D-Algorithm-Combinational
Combinational ATPG generator based on D-Algorithm
Language: C++ - Size: 394 KB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 11 - Forks: 3
TadejMurovic/BNN_Deployment
Part of paper: Massively Parallel Combinational Binary Neural Networks for Edge Processing
Language: MATLAB - Size: 21.2 MB - Last synced at: 11 months ago - Pushed at: almost 6 years ago - Stars: 10 - Forks: 1
Ashwin-op/Circuit_Paths
Finding all possible paths between input and output in a given Combinational Circuit.
Language: Python - Size: 474 KB - Last synced at: almost 2 years ago - Pushed at: over 4 years ago - Stars: 4 - Forks: 1
arjunrajasekharan/Circuit-Path-Enumeration
Considering combinational logic circuit (bipartite graph) as adjacent list and enumerate all the paths from input to output. Visualise gate-level verilog code as a directed graph. Networkx library was used to draw the graphs.
Language: Python - Size: 8.79 KB - Last synced at: 12 months ago - Pushed at: about 4 years ago - Stars: 3 - Forks: 1
imvickykumar999/Logical-Redstone-Reloaded
Download my Redstone World: https://www.planetminecraft.com/project/redstone-circuits-6024948/
Language: Python - Size: 128 MB - Last synced at: about 2 months ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 1
Sujal-Burad/EE-2703---Applied-Programming-Lab
Implementing basic Electrical Engineering Concepts in Python
Language: Jupyter Notebook - Size: 10.7 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 1 - Forks: 0
rohankalbag/logic-simulator
Course Assignment - Foundations of VLSI CAD - Autumn Semester 2022 - Indian Institute of Technology Bombay
Language: Jupyter Notebook - Size: 95.7 KB - Last synced at: 3 months ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0
AndreasKaratzas/circuit-simulation
This is a Combinational Circuit Logic Simulation Tool. There is a C++ version and a C version.
Language: C++ - Size: 442 KB - Last synced at: about 2 years ago - Pushed at: almost 3 years ago - Stars: 1 - Forks: 1
touunix/MUX-VHDL
MUX VHDL | Układ kombinacyjny VHDL
Language: VHDL - Size: 681 KB - Last synced at: over 1 year ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0
MostafaSaftawy/Nand2Tetris
This is a projects have been completed through 2 parts of nand2tetris course on coursera.
Language: Hack - Size: 165 KB - Last synced at: almost 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 0
BaseMax/AnalyzeCombine
Analyze the combine with and without the repetition. (SOON)
Language: PHP - Size: 25.4 KB - Last synced at: 5 days ago - Pushed at: about 6 years ago - Stars: 1 - Forks: 1
anushka5531/multiplier-with-BCD-display
A multiplier which computes the product of two 4-bit numbers and displays the output in BCD format.
Size: 25.4 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0
gmostofabd/Digital-Logic-Circuits-and-Designs
🚀 This collection contains experiments focusing on the basics of digital logic gates using common ICs, equivalent circuits, and practical implementation using a breadboard. Investigates the functional truth tables of gates and simplification procedures using Boolean math's , Karnaugh mapping, de-Morgan's law etc.
Language: HTML - Size: 10.7 MB - Last synced at: 2 months ago - Pushed at: 8 months ago - Stars: 0 - Forks: 0
youseftareq33/Digital_BuildCombinationalCircuit_2
Using Verilog HDL on Quartus application build combinational circuit
Language: HTML - Size: 3.83 MB - Last synced at: 26 days ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0
youseftareq33/Digital_BuildCombinationalCircuit_1
Using Verilog HDL on Quartus application build combinational circuit
Language: Verilog - Size: 2.08 MB - Last synced at: 26 days ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0
RichaSavant/Icarus-Verilog-HDL-Logical-Circuits-2023
This repository focuses on designing and simulating logical circuits using Verilog HDL (Hardware Description Language) with the Icarus Verilog simulator.
Language: Verilog - Size: 76.2 KB - Last synced at: 2 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0
CrystaS15/Computer-Logic-Design-I
Logic gates, simplification of Boolean functions, design and testing of combinational and sequential circuits including code converters, multiplexers, adders, and synchronous counters. For non-electrical and non-computer engineering majors only.
Size: 117 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
atvatsal/tiny-faults
Simple EDA tool for fault reduction and testing for combinational circuits
Language: Python - Size: 2.35 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0
Aayush-Gangwar/Combinational-circuit-simulator
A combinational circuit simulator web for Windows written in python.
Language: Python - Size: 129 KB - Last synced at: about 1 year ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0
CodeWithAbbas/FPGA-Designing
It contains the VHDL coding of basic combinational and sequential circuits as well as top level design including Datapath and Controller
Size: 37.1 KB - Last synced at: almost 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0
rh3xp/logisim-prime-number-detector
A basic combinational circuit designed to detect if the given 4-bit binary number is prime or not.
Size: 71.3 KB - Last synced at: 11 months ago - Pushed at: over 7 years ago - Stars: 0 - Forks: 1
