Topic: "spartan6"
ultraembedded/minispartan6-audio
miniSpartan6+ (Spartan6) FPGA based MP3 Player
Language: Verilog - Size: 595 KB - Last synced at: 5 months ago - Pushed at: almost 6 years ago - Stars: 27 - Forks: 8

olegv142/STM32AllProgrammable
STM32F407 + Spartan6 combo with high speed USB TMC interface
Language: C - Size: 10.7 MB - Last synced at: over 2 years ago - Pushed at: over 5 years ago - Stars: 11 - Forks: 1

kargaranamir/Microphone-Record-Array-FPGA-Verilog
Design and Implementation of Microphone Array using Spartan6 ic, cs5340 ic, and I2S protocol for recording the sound of the heart and lung
Language: C - Size: 67.8 MB - Last synced at: 5 days ago - Pushed at: over 1 year ago - Stars: 10 - Forks: 3

ussserrr/spartan6-mcu-configuration
Configure Xilinx Spartan-6 FPGA using Texas Instruments ARM MCU
Language: C - Size: 147 KB - Last synced at: 3 months ago - Pushed at: over 6 years ago - Stars: 8 - Forks: 1

ViktorSlavkovic/FPGA_Tetris
FPGA Tetris written in Verilog
Language: Verilog - Size: 75.2 KB - Last synced at: over 1 year ago - Pushed at: about 7 years ago - Stars: 7 - Forks: 2

oliviercotte/Multi-level-delta-sigma-modulator
Multi-level second-order (Silva Steensgaard Structure) delta-sigma modulator
Language: VHDL - Size: 68.7 MB - Last synced at: almost 2 years ago - Pushed at: over 7 years ago - Stars: 4 - Forks: 1

rv2442/16BitScientificCalculator
16 Bit Scientific Calculator Using Xilinx ISE 14.7 on Xilinx ISE, EDA Playground and Simple 4 bit calculator on Spartan 6 Board
Language: C - Size: 961 KB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 3 - Forks: 2

markus-k/rv32-soc
A simple RISC-V SoC based on picorv32
Language: VHDL - Size: 26.4 KB - Last synced at: 9 days ago - Pushed at: over 5 years ago - Stars: 3 - Forks: 0

MossbauerLab/MessbauerTestEnvironment
FPGA Messbauer hardware (generator, emulation of signal from gamma-source registered and amplified
Language: Verilog - Size: 2.84 MB - Last synced at: over 1 year ago - Pushed at: almost 6 years ago - Stars: 3 - Forks: 1

Abubakar26/RISC-V_Processor
32-bit softcore processor for FPGA 💻
Language: Verilog - Size: 228 KB - Last synced at: about 2 years ago - Pushed at: over 6 years ago - Stars: 2 - Forks: 0

oliviercotte/Digilent-Atlys-Boot-Linux-Image
Digilent Atlys Board Linux Flash Image
Size: 9.34 MB - Last synced at: almost 2 years ago - Pushed at: over 7 years ago - Stars: 2 - Forks: 0

oliviercotte/All-digital-modulator
All digital lowpas delta-sigma modulator (+digital up-converter) tune to fmax = 9 MHz
Language: HTML - Size: 128 MB - Last synced at: almost 2 years ago - Pushed at: over 7 years ago - Stars: 2 - Forks: 3

briansune/FPGA-TFT-MIPI-or-DPI
FPGA-TFT-MIPI-or-DPI
Language: HTML - Size: 10.6 MB - Last synced at: 17 days ago - Pushed at: 17 days ago - Stars: 1 - Forks: 0

gao-yiheng/Nexys3
Verilog code that could run on Nexys3 (Spartan-6)
Language: Verilog - Size: 60.5 KB - Last synced at: 12 months ago - Pushed at: 12 months ago - Stars: 1 - Forks: 1

szym-mie/vga_src
Original VGA video card Verilog implementation with custom hardware
Language: Verilog - Size: 42 KB - Last synced at: 4 months ago - Pushed at: about 1 year ago - Stars: 1 - Forks: 0

mozerj2001/stack-attack-for-SPARTAN6
Creating a stack-attack like game for the Xilinx Spartan6 FPGA. A custom extension board was used for VGA control, created at BME. The program includes the VGA control hardware design, as well as software implementation in C. Use Xilinx ISE 14.7 and Xilinx SDK to compile.
Language: C - Size: 6.12 MB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

wandergithub/Google_T-rex_Game
This proyect is a game made with Verilog. Implementing a copy of the T-rex google game using an FPGA in a Spartan 6 with the use of VGA.
Language: Verilog - Size: 4.06 MB - Last synced at: over 2 years ago - Pushed at: about 4 years ago - Stars: 1 - Forks: 0

kargaranamir/Paper-Soccer-FPGA-Verilog
Paper soccer implementation by verilog on spartan6
Language: HTML - Size: 53 MB - Last synced at: 5 days ago - Pushed at: over 5 years ago - Stars: 1 - Forks: 0

al45tair/pipistrello-TOSlink
TOSLink fibre data capture for Pipistrello (Xilinx SPARTAN 6)
Language: Verilog - Size: 214 KB - Last synced at: about 2 years ago - Pushed at: over 6 years ago - Stars: 1 - Forks: 1

vivekadi/FPGA_Verilog_Interfacing
Interfacing peripherals to FPGA
Size: 4.88 KB - Last synced at: 5 months ago - Pushed at: over 6 years ago - Stars: 1 - Forks: 0

migraichen/light52
FreeRTOS running on light52 CPU on a Spartan6 FPGA
Language: C - Size: 1.8 MB - Last synced at: over 2 years ago - Pushed at: over 6 years ago - Stars: 1 - Forks: 1

szym-mie/vga3
Redesign of 'vga_src' video card architcture using proper FIFOs
Language: Verilog - Size: 3.56 MB - Last synced at: about 2 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

pinballwizz/AX309-MoonCresta
Moon Cresta Arcade synthesized on a AX309 Clone Dev Board.
Language: VHDL - Size: 1.2 MB - Last synced at: 10 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0

muralikarteek7/KRSSG-FPGA
Language: C - Size: 18.5 MB - Last synced at: 9 months ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 2

muralikarteek7/FPGA-Robocup19
This is the FPGA code for SSL bots , Robocup 2019
Language: Verilog - Size: 1.38 MB - Last synced at: 9 months ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 2
