GitHub / ab-ff / Multi-Bit-Comparator
Variations of a multi-bit generalized comparator for different area and timing.
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Size: 1000 Bytes
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Created at: 3 months ago
Updated at: 2 days ago
Pushed at: 2 days ago
Last synced at: 2 days ago
Topics: altera-quartus, comparator, digital-design, fpga-programming, low-power, power-gating, register-transfer-level, rtl, rtl-design, serial-port, serialization, verilog-hdl, vlsi, vlsi-design
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