GitHub topics: max1000
filiparag/ftn-riscv-mcu 📦
Softcore microcontroller with peripherals based on PicoRV32
Language: Verilog - Size: 459 KB - Last synced at: 5 days ago - Pushed at: 8 months ago - Stars: 2 - Forks: 0
fjpolo/CourseraFPGADesignforEmbeddedSystemsSpecialization
Projects and labs from the courses dictated in https://www.coursera.org/specializations/fpga-design. Projects are sometimes simulated, and implemented in either a MAX10-Lite or an Arrow MAX1000 board.-
Language: Verilog - Size: 94.3 MB - Last synced at: 9 months ago - Pushed at: about 4 years ago - Stars: 10 - Forks: 3
AtlasFPGA/BASECARRIERBOARDATLAS
Base carrier board for ATLAS, cost reduced version.
Language: HTML - Size: 22.6 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 0
Cellgalvano/vhdl_rgbmatrix_driver
A simple driver for RGB Led Panels of different sizes
Language: C++ - Size: 257 KB - Last synced at: over 1 year ago - Pushed at: about 5 years ago - Stars: 8 - Forks: 3
AtlasFPGA/FreeSamples_MicroFPGAs
Indicar direcciones correctas para obtener MicroFPGAs CYC1000 MAX1000
Size: 396 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0
AtlasFPGA/ALMA_FIRMWARE_AND_CORE_Guillermo_Amat
The core and firmware that uses nowadays the PI-PICO family for use in ATLAS I/O Board is located in GITLAB.
Size: 41.6 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0
wd5gnr/verifla
Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm
Language: Verilog - Size: 1.02 MB - Last synced at: about 2 years ago - Pushed at: over 6 years ago - Stars: 23 - Forks: 4
AtlasFPGA/USB_DIRECT_CYC1000_ATLAS_THESONDERS
The CYC1000 and MAX1000 both has a selectable 2 pins with pull up and pull down.
Size: 883 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
AtlasFPGA/Pr-cticas_URIEL_TAPIA_MAX1000
Prácticas muy interesantes donde nos enseñan a usar las caracterÃsticas de la MAX1000.
Size: 290 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
AtlasFPGA/Demo_PIOTR.GO_888_DVI
This code creates a bidimensional pattern.
Size: 30.3 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
AtlasFPGA/MAXimator-PONG-HDMI-max1000
Port of a maximator pong into MAX1000 with I/O Board ATLAS
Size: 4.29 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
AtlasFPGA/DVI_1280x1024_CYC1000
RTL, a graphic form to deal with free wrappers in DVI signals
Language: Verilog - Size: 88.9 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
AtlasFPGA/COLOR_PAL_THESONDERS
Incredible code to implementen a pal signal with a level count of pins in verilog.
Size: 742 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
wd5gnr/max1000-tutorial Fork of vpecanins/max1000-tutorial
Tutorial and example projects for the Arrow MAX1000 FPGA board
Language: Verilog - Size: 696 KB - Last synced at: about 2 years ago - Pushed at: over 6 years ago - Stars: 13 - Forks: 7