pytorch/cpuinfo

CPU INFOrmation library (x86/x86-64/ARM/ARM64, Linux/Windows/Android/macOS/iOS)

Language: C - Size: 5 MB - Last synced at: about 1 hour ago - Pushed at: 13 days ago - Stars: 1,084 - Forks: 354

MIPT-ILab/mipt-mips 📦

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs

Language: C++ - Size: 113 MB - Last synced at: 23 days ago - Pushed at: almost 3 years ago - Stars: 353 - Forks: 138

wkoszek/cpu60

Example of CPU simulation in software

Language: C - Size: 141 KB - Last synced at: 1 day ago - Pushed at: over 9 years ago - Stars: 158 - Forks: 13

sake92/nand2tetris

Nand2Tetris course solutions

Language: Scala - Size: 13 MB - Last synced at: about 1 month ago - Pushed at: 12 months ago - Stars: 71 - Forks: 24

wyvernSemi/riscV

Open source ISS and logic RISC-V 32 bit project

Language: C++ - Size: 72.2 MB - Last synced at: 22 days ago - Pushed at: 22 days ago - Stars: 50 - Forks: 14

alirezakay/RISC-CPU

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

Language: VHDL - Size: 2.52 MB - Last synced at: about 2 months ago - Pushed at: almost 4 years ago - Stars: 27 - Forks: 5

education-script-projects/PyCPU

Central Processing Unit Information Gathering Tool

Language: Python - Size: 9.77 KB - Last synced at: over 1 year ago - Pushed at: over 5 years ago - Stars: 19 - Forks: 8

zpekic/MicroCodeCompiler

https://hackaday.io/project/172073-microcoding-for-fpgas

Language: C# - Size: 2.51 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 10 - Forks: 0

wyvernSemi/cpu8051

Intel(R) 8051 Instruction Set Simulator

Language: C - Size: 921 KB - Last synced at: about 1 month ago - Pushed at: over 1 year ago - Stars: 10 - Forks: 4

wyvernSemi/mico32

LatticeMico32 instruction set simulator project

Language: C++ - Size: 12.3 MB - Last synced at: about 1 month ago - Pushed at: 6 months ago - Stars: 9 - Forks: 3

wyvernSemi/cpu6502

A 6502 Instruction Set Simulator

Language: Assembly - Size: 3.44 MB - Last synced at: about 1 month ago - Pushed at: about 1 year ago - Stars: 9 - Forks: 2

evanlissoos/OISC

One Instruction Set Computer

Language: Python - Size: 212 KB - Last synced at: 6 months ago - Pushed at: over 7 years ago - Stars: 9 - Forks: 2

wyvernSemi/sparc

Sparc version 8 Instruction Set Simulator

Language: Assembly - Size: 1.3 MB - Last synced at: about 1 month ago - Pushed at: 3 months ago - Stars: 6 - Forks: 4

vrobot/cpu-design

8 bit cpu I designed on logisim

Size: 23.4 KB - Last synced at: almost 2 years ago - Pushed at: almost 7 years ago - Stars: 6 - Forks: 4

leepoly/chisel-pobu-cache

Language: Verilog - Size: 709 KB - Last synced at: about 2 years ago - Pushed at: over 6 years ago - Stars: 5 - Forks: 0

Steve-Teal/pumpkin-cpu

A small general purpose, scalable, 16-bit, 16 instruction CPU core written in VHDL

Language: C - Size: 83 KB - Last synced at: almost 2 years ago - Pushed at: over 4 years ago - Stars: 4 - Forks: 0

morris821028/hw-radiosity

CPU-based Radiosity: Final Team Project., testing - optimization & parallel skill

Language: C++ - Size: 25.8 MB - Last synced at: about 1 year ago - Pushed at: over 8 years ago - Stars: 3 - Forks: 1

Sh-Zh-7/tiny-CPU

Tiny series: A handwritten CPU of MIPS instruction set.

Language: Verilog - Size: 2.54 MB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 2 - Forks: 0

cyring/topology

Language: C - Size: 17.6 KB - Last synced at: 2 months ago - Pushed at: over 7 years ago - Stars: 1 - Forks: 1

4x7y/Mini-CPU

Language: Verilog - Size: 36.1 KB - Last synced at: about 1 year ago - Pushed at: over 8 years ago - Stars: 1 - Forks: 0

MIPT-ILab/PipelineFlowchartVis 📦

MIPT-V Pipeline Flowchart Visualizer

Language: CSS - Size: 2.18 MB - Last synced at: about 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 1

YuHu0621/simpleMIPs

Language: Python - Size: 6.84 KB - Last synced at: about 2 years ago - Pushed at: about 8 years ago - Stars: 0 - Forks: 0

raffy-bekhit/16-bit-CPU-Simulator

A program that simulates how a 16-bit CPU works

Language: C - Size: 2.93 KB - Last synced at: about 2 years ago - Pushed at: about 8 years ago - Stars: 0 - Forks: 0

reedv/Simple-MIPS-CPU

A simple pipelined MIPS CPU implemented in verilog. Can perform add, addi, beq, j, lw, and sw instructions.

Language: Verilog - Size: 360 KB - Last synced at: about 2 years ago - Pushed at: over 8 years ago - Stars: 0 - Forks: 0