mips-architecture | Topic | Ecosyste.ms: Repos

Topic: "mips-architecture"

Specy/asm-editor

A modern webapp to write, run and learn M68K and MIPS assembly code

Language: Svelte - Size: 4.49 MB - Last synced at: 7 days ago - Pushed at: 8 days ago - Stars: 147 - Forks: 8

aeris170/MARS-Theme-Engine

It's all coming back into focus!

Language: Java - Size: 14.5 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 65 - Forks: 9

neelkshah/MIPS-Processor

5-stage pipelined 32-bit MIPS microprocessor in Verilog

Language: Verilog - Size: 138 KB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 64 - Forks: 13

ljlin/MIPS48PipelineCPU

5 stage pipelined MIPS-32 processor

Language: Verilog - Size: 1.78 MB - Last synced at: 5 months ago - Pushed at: about 5 years ago - Stars: 57 - Forks: 11

ffcabbar/MIPS-Assembly-Language-Examples

:heavy_check_mark: Examples to learn Mips

Language: Assembly - Size: 12.7 KB - Last synced at: 12 days ago - Pushed at: about 5 years ago - Stars: 56 - Forks: 12

SilenceX12138/MIPS-Microsystems

A computer system containing CPU, OS and Compiler under MIPS architecture.

Language: Verilog - Size: 8.8 MB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 52 - Forks: 0

maze1377/pipeline-mips-verilog

A classic 5-stage pipeline MIPS 32-bit processor. solve every hazard with stall

Language: Verilog - Size: 229 KB - Last synced at: 8 days ago - Pushed at: 3 months ago - Stars: 43 - Forks: 8

RomeoMe5/DDLM

Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)

Language: Verilog - Size: 121 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 43 - Forks: 33

Ingenic-community/linux

Linux kernel source tree with the latest features and modifications to unleash the full potential of Ingenic processors.

Language: C - Size: 246 MB - Last synced at: 26 days ago - Pushed at: 26 days ago - Stars: 27 - Forks: 6

edoardottt/asm-snippets

Some of my assembly code (examples, iterative and recursive algorithms) from Computer's Architecture course in Sapienza University, CS Bachelor's Degree :floppy_disk:

Language: Assembly - Size: 710 KB - Last synced at: 18 days ago - Pushed at: 5 months ago - Stars: 19 - Forks: 5

JoMedeiros/MIPSnake

A snake game developed in assembly for MIPS processor

Language: Assembly - Size: 13.8 MB - Last synced at: almost 2 years ago - Pushed at: almost 7 years ago - Stars: 12 - Forks: 4

prantoamt/16bit_processor_design

Size: 292 KB - Last synced at: about 1 year ago - Pushed at: over 6 years ago - Stars: 11 - Forks: 6

aliiimaher/MIPS-Verilog

MIPS architecture implemented in Verilog.

Language: C - Size: 1.64 MB - Last synced at: 19 days ago - Pushed at: about 2 years ago - Stars: 9 - Forks: 0

i-evi/sse2msa

A C/C++ header file that converts Intel SSE intrinsics to MIPS/MIPS64 MSA intrinsics.

Language: C - Size: 38.1 KB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 8 - Forks: 1

cissagatto/MIPS32BitsCheatsheet

Cheatsheet completinha do MIPS 32 bits - MIPS Technologies

Size: 7.71 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 7 - Forks: 0

Devorein/aisem

A web app to convert MIPS assembly code to machine code

Language: TypeScript - Size: 115 KB - Last synced at: 22 days ago - Pushed at: about 3 years ago - Stars: 7 - Forks: 0

respinha/mips-systemc

Assignment from the Advanced Computer Architecture class.

Language: C++ - Size: 15.6 MB - Last synced at: about 1 year ago - Pushed at: over 8 years ago - Stars: 7 - Forks: 1

Passant-Abdelgalil/MIPS-Processor-Harvard-Architecture

A Simple 5-stage 32-bit pipelined processor with Harvard architecture and a RISC-like instruction set architecture.

Language: VHDL - Size: 23.7 MB - Last synced at: almost 2 years ago - Pushed at: over 3 years ago - Stars: 6 - Forks: 1

zarif98sjs/CSE-306-Computer-Architecture

CSE-306-Computer-Architecture Offline / Assignment on ALU, Floating Point Adder and 8 bit MIPS Datapath along with pipelining

Language: C++ - Size: 19.1 MB - Last synced at: about 1 year ago - Pushed at: almost 4 years ago - Stars: 6 - Forks: 3

MIPT-ILab/mips-traces 📦

MIPS programs with MARS system calls

Language: Assembly - Size: 5.63 MB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 6 - Forks: 5

jiajudu/mips

32-bit MIPS CPU

Language: C - Size: 2.64 MB - Last synced at: over 1 year ago - Pushed at: about 5 years ago - Stars: 6 - Forks: 0

viniciusfinger/assembly-mips

Lasalle University - Computer Architecture 2020/1 - Assembly + MIPS architecture

Language: Assembly - Size: 21.5 KB - Last synced at: 10 days ago - Pushed at: over 1 year ago - Stars: 5 - Forks: 0

pauldeng/qt5-openwrt-package Fork of pawelkn/qt5-openwrt-package

Qt 5 package for OpenWRT

Language: Makefile - Size: 1.41 MB - Last synced at: 9 days ago - Pushed at: almost 2 years ago - Stars: 5 - Forks: 5

holden-davis-uca/MARS-UCA

Modification of the MARS program originally written by Kenneth Vollmar and Pete Sanderson at Missouri State University.

Language: HTML - Size: 55.6 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 5 - Forks: 1

EmanOthman21/MIPS-Pipelined-Processor

This is a MIPS 5 stage 32-bit pipelined processor with Harvard architecture, which comes with an assembler to interpret instructions to supported OP codes.

Language: VHDL - Size: 396 KB - Last synced at: almost 2 years ago - Pushed at: over 3 years ago - Stars: 5 - Forks: 1

mongrelgem/cMIPS

A complete classic 5-stage pipeline MIPS 32-bit processor, including a 2-bit branch predictor, a branch prediction buffer and a direct-mapped cache.

Language: Verilog - Size: 4.09 MB - Last synced at: 3 months ago - Pushed at: over 5 years ago - Stars: 5 - Forks: 0

Choaib-ELMADI/working-with-fpga-and-mips

A collection of practical sessions exploring FPGA programming and MIPS-based systems using the ALTERA Cyclone V DE-1 SoC board.

Language: Verilog - Size: 11.2 MB - Last synced at: 15 days ago - Pushed at: 15 days ago - Stars: 4 - Forks: 0

LIU42/Processor

《计算机组成原理》课程设计，基于 MIPS 的流水线 CPU 系统设计。

Language: Verilog - Size: 97.7 KB - Last synced at: 15 days ago - Pushed at: 4 months ago - Stars: 4 - Forks: 0

CodeDroid999/MIPS-Assembler-in-C

An Assembler to read and parse MIPS Assembly code and then generate an output file

Language: C - Size: 23.4 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 4 - Forks: 0

ali-asnaashari/Computer_Architecture_Lab-CAL-2021

Computer Architecture Lab Course 2022/1400, Fall CSE & IT Dept., Shiraz University

Language: Verilog - Size: 1.2 MB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 4 - Forks: 0

susiejojo/MIPS_processor

A simple MIPS processor implemented using Verilog capable of supporting basic I,J and R type instructions. Built using Xilinx Vivado 2019.1

Language: Verilog - Size: 166 KB - Last synced at: 18 days ago - Pushed at: almost 5 years ago - Stars: 4 - Forks: 1

aeris170/Dark-Side-of-MARS

DEPRECATED!!! An (almost) fully functional theme engine for MARS.

Language: Java - Size: 3.65 MB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 4 - Forks: 0

bwbryant1/CTL_C1100Z

My attempt at reverse engineering my modem's firmware

Language: C - Size: 504 MB - Last synced at: over 1 year ago - Pushed at: almost 8 years ago - Stars: 4 - Forks: 5

BRAINIAC2677/CSE-306-Computer-Architecture

Contains the project resources of the course CSE306. These were group projects.

Language: TeX - Size: 12 MB - Last synced at: about 1 month ago - Pushed at: almost 2 years ago - Stars: 3 - Forks: 0

marcelo-schreiber/cpu-circuit-mico

Processador MICO X1 implementado no Digital.

Size: 702 KB - Last synced at: 2 months ago - Pushed at: over 2 years ago - Stars: 3 - Forks: 0

sinasoltani123/32-bit-pipelined-MIPS-processor-implemented-using-Verilog-with-booth-multiplication-algorithm

32-bit pipelined MIPS CPU using Verilog with booth multiplication algorithm (faster multiplication in hardware). Xilinx Sesign Suite

Language: Verilog - Size: 15.6 KB - Last synced at: over 1 year ago - Pushed at: almost 3 years ago - Stars: 3 - Forks: 0

psh4607/32-bit-MIPS-Processor-Pipeline

A 32-bit MIPS processor developed in Verilog based on pipeline

Language: C - Size: 5.87 MB - Last synced at: almost 2 years ago - Pushed at: over 3 years ago - Stars: 3 - Forks: 0

juneadkhan/BinarySearch-Assembly

An Iterative Implementation of the Binary Search Algorithm in Assembly Language for the MIPS Architecture.

Language: Assembly - Size: 9.77 KB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 3 - Forks: 0

This library is intended to be used with the branchless programming technique which generally plays nicer with RISC systems. Sometimes, pipeline hazards (structural, or data) which can potentially manifest as pipeline stalls, can occur through branch instruction sequences that the compiler cannot avoid. These bubbles can be avoided by using arithmetic instructions instead of branching multiple times. Using bits not only saves memory, but also in most cases, speeds up the logic.

Language: C - Size: 30.3 KB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 3 - Forks: 0

DanielGunna/Mips-Assembly-Examples

Some examples that solve basic problems using assembly for Mips developed as coursework for Architecture and Computer Organization II - @Puc Minas

Language: Assembly - Size: 4.88 KB - Last synced at: about 2 years ago - Pushed at: about 7 years ago - Stars: 3 - Forks: 0

z1skgr/Memory-Management-I-O

Memory orchestration at the different levels of languages

Language: C - Size: 55.7 KB - Last synced at: 20 days ago - Pushed at: 5 months ago - Stars: 2 - Forks: 0

MrAHMED14/mips-mini-assembler

A mini-assembler for MIPS R3000 that converts supported instructions into machine code represented in hexadecimal format.

Language: C - Size: 76.2 KB - Last synced at: 16 days ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 0

MasterCruelty/HalfLifeAssembly

This was my project I made for the exam of computer architecture 2 at University of Milan

Language: Assembly - Size: 26.4 KB - Last synced at: about 1 month ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 0

tinsir888/computer-architecture

NKU CS major compulsory course in 5th semester, taught by Prof. Bai Gang.

Language: Verilog - Size: 58.3 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 2 - Forks: 0

TomerGibor/MIPS-Disassembler-and-Emulator

A Disassembler and Emulator for the MIPS Architecture Written in C.

Language: C - Size: 60.5 KB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 2 - Forks: 0

Coekjan/MIPS-CPU 📦

MIPS CPU Constructed By Chisel 3.

Size: 34.2 KB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 2 - Forks: 0

VitorgsRuffo/Learning-MIPS

This is a repo for storing my MIPS .asm files.

Language: Assembly - Size: 1.3 MB - Last synced at: 11 months ago - Pushed at: over 3 years ago - Stars: 2 - Forks: 0

ukashasohail/MIPS_32bit_SCDP_Verilog

An implementation of 32-bits MIPS Single Cycle Datapath in Verilog HDL.

Language: Verilog - Size: 14.6 KB - Last synced at: about 2 years ago - Pushed at: about 4 years ago - Stars: 2 - Forks: 0

alexsocha/mipsplusplus

MIPS++: A low-level programming language

Language: Python - Size: 28.3 KB - Last synced at: 20 days ago - Pushed at: over 4 years ago - Stars: 2 - Forks: 0

Elzawawy/mips-processor-simulator

A simplified MIPS machine simulator using SystemVerilog, developed with three different micro-architectures: single-cycle, multi-cycle and pipelined.

Language: SystemVerilog - Size: 1.05 MB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 2 - Forks: 3

AaronGG11/Arquitectura-de-computadoras

Curso tomado en la ESCOM, con la Maestra Nayeli Garcia Vega.

Language: JavaScript - Size: 8.45 MB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 2 - Forks: 0

kalhorghazal/Mips-MultiCycle

Mips Multi-Cycle, Computer Architecture course, University of Tehran

Language: SystemVerilog - Size: 18.6 KB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 2 - Forks: 0

robbell/learning-asm

Working through the MIPS ASM tutorial from https://chortle.ccsu.edu/AssemblyTutorial/

Language: Assembly - Size: 47.9 KB - Last synced at: 4 days ago - Pushed at: almost 5 years ago - Stars: 2 - Forks: 0

Sh-Zh-7/tiny-CPU

Tiny series: A handwritten CPU of MIPS instruction set.

Language: Verilog - Size: 2.54 MB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 2 - Forks: 0

meton-robean/32bits_MIPS_CPU

基于logisim实现的单周期MIPS CPU仿真：32 bits MIPS CPU processor based on logisim

Size: 109 KB - Last synced at: over 1 year ago - Pushed at: over 6 years ago - Stars: 2 - Forks: 3

mhazizian/Computer-Architecture-CA-2

Language: SystemVerilog - Size: 91.8 KB - Last synced at: over 1 year ago - Pushed at: about 7 years ago - Stars: 2 - Forks: 0

zxhero/Zkernel

A simple kernel based on MIPS ISA. A File system based on FUSE

Language: C - Size: 4.88 MB - Last synced at: almost 2 years ago - Pushed at: about 7 years ago - Stars: 2 - Forks: 0

AbdallahReda/MIPSProcessor

Verilog Description for a 32bit MIPS Processor

Language: Verilog - Size: 8.83 MB - Last synced at: over 1 year ago - Pushed at: about 7 years ago - Stars: 2 - Forks: 1

oaxelou/ce232

Computer Organization and Design (2nd year - 3rd semester)

Language: Verilog - Size: 32 MB - Last synced at: about 2 years ago - Pushed at: over 7 years ago - Stars: 2 - Forks: 1

mariomarton/assembly-snake

Two-player Snake game written in assembly language. Designed for the MIPS CPU architecture. Thanks to QTMips Online, it can be run in a web browser.

Language: Assembly - Size: 115 KB - Last synced at: about 1 month ago - Pushed at: about 2 months ago - Stars: 1 - Forks: 0

ZIKOAR/32-bit-processor-with-vhdl

A 32-bit VHDL processor with 26 instructions, including jumps, branches, and function calls. Implementing an FSM for execution control and testing using Quartus and ModelSim.

Language: VHDL - Size: 6.84 KB - Last synced at: 29 days ago - Pushed at: about 2 months ago - Stars: 1 - Forks: 1

JonayedMohiuddin/8bit-PIPELINED-MIPS

An 8-bit MIPS processor designed in Logisim, featuring pipelined and non-pipelined architectures, a custom assembler for MIPS assembly to binary conversion, extended I/O peripheral support, and some playable Game implemented in MIPS assembly.

Language: C++ - Size: 37.3 MB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 1 - Forks: 0

mrtaz77/Computer-Architecture

Computer Architecture Projects

Language: TeX - Size: 14.4 MB - Last synced at: 18 days ago - Pushed at: 5 months ago - Stars: 1 - Forks: 0

jfgmesquita/Basic-Algorithms-in-Assembly

Introduction to programming (2023/2024)

Language: Assembly - Size: 37.1 KB - Last synced at: about 2 months ago - Pushed at: 9 months ago - Stars: 1 - Forks: 0

AnthonyNMassaad/MIPS-Assembly-Game

MIPS Assembly Game

Language: Assembly - Size: 30.3 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 1 - Forks: 0

ElectroBoy404NotFound/pico-uMIPS

Dmitry Grinberg's uMIPS emulator on the Raspberry Pi Pico

Language: C - Size: 3.08 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 1 - Forks: 0

meeeeet/Single-Cycle-MIPS32-Processor

Language: Verilog - Size: 15.6 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 1 - Forks: 0

MekhyW/DesComp

32-bit processor simulation and implementation on a FPGA, using VHDL and Intel Quartus Prime software

Language: VHDL - Size: 21.4 MB - Last synced at: about 2 months ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

saliherdemk/Mips-Datapath-Simulator

This is a website for demonstration of how most of the basic instructions work in MIPS architecture

Language: JavaScript - Size: 2.38 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

tianrui-qi/MIPS-Processor

A full gate-level circuit implemented by C, representing the datapath for a reduced MIPS ISA.

Language: C - Size: 2.71 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

AnshikSahu/Pipeline_Simulator-COL216-

Simulator for MIPS pipeline

Language: C++ - Size: 10.5 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

SheidaAbedpour/Single-Cycle-Datapath

simple mips architecture

Language: Verilog - Size: 420 KB - Last synced at: 11 months ago - Pushed at: almost 2 years ago - Stars: 1 - Forks: 0

IgnacioChirinos/MIPS-VHDL-Vivado

MIPS processor that performs matrix multiplication 3x3 based on VHDL and implemented in XILINX

Language: VHDL - Size: 296 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 1 - Forks: 0

giorgosv12/mips-processor

Language: Verilog - Size: 3.44 MB - Last synced at: almost 2 years ago - Pushed at: about 2 years ago - Stars: 1 - Forks: 0

leyviya/computer-organisation

Computer Organisation course materials and semester projects

Language: Assembly - Size: 443 KB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

KPMGE/learnig-assembly

My programs and tests with MIPS assembly language.

Language: Assembly - Size: 12.7 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

rajsinghtech/MIPS-Pipelined-Processor

CPRE 381 Project 2 Pipelined Processor - Both hardware and software

Language: HTML - Size: 123 MB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

Matheus-Souza-Rozendo/marsbot

Desenho criado usando assembly da arquitetura mips

Language: Assembly - Size: 3.72 MB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

MisaghM/Computer-Architecture-Course-Projects

Verilog descriptions of MIPS single-cycle, multi-cycle & pipeline implementations.

Language: Verilog - Size: 3.09 MB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 1

arashsm79/mips-hdl

Single-cycle and multi-cycle implementation of a subset of MIPS instruction set

Language: Verilog - Size: 504 KB - Last synced at: almost 2 years ago - Pushed at: almost 3 years ago - Stars: 1 - Forks: 0

nguyenj-c/Assembler_MIPS

Reuplod of old work done for a course about MIPS

Language: Assembly - Size: 11.7 KB - Last synced at: about 2 months ago - Pushed at: almost 3 years ago - Stars: 1 - Forks: 0

akankshac-073/MIPS-5-stage-pipelined-control-and-datapath

Implementation of a 32-bit 5 stage Pipelined MIPS Processor using RTL coding in Verilog on ModelSim simulator. The processor datapath and control units are designed for Arithmetic and Logical instructions (all r-type instructions + addi, andi, ori, slti), Data transfer instructions (lw, sw), Branch and jump instructions (beq, j). Forwarding control, hazard detection and stalling units are also implemented to improve the efficiency of the pipeline. The designed processor can be tested by initializing the instruction memory with test instructions and obtaining the corresponding register contents by generating waveforms on ModelSim.

Language: Verilog - Size: 20.5 KB - Last synced at: over 1 year ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 1

evansaboo/micro-processor-programming

Language: C - Size: 651 KB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

aminhm/MIPS-CPU-simulator

Language: Python - Size: 3.45 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 0

david-shmailov/CPU_task3_MIPS

We implemented a single cycle version of the MIPS CPU in VHDL code, under the simplification of 1 cycle memory delay, a reduced instruction set defined by the assignment, and 10-bit memory space. We then used the Quartus FPGA chipset to verify the design. By David Shmailov and Aviram Lachmani

Language: VHDL - Size: 1.08 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 1