Topic: "fpga-projects"
psychogenic/riffpga
riffpga -- write FPGA bitstreams through a USB drive, get USB serial and dynamic clocking in a platform independent way
Language: C - Size: 2.42 MB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 50 - Forks: 3
ashvnv/FPGA-Ping-Pong-game
Simple Ping Pong game on Xilinx Spartan 3E
Language: HTML - Size: 13.9 MB - Last synced at: about 1 month ago - Pushed at: almost 3 years ago - Stars: 5 - Forks: 2
yigitbektasgursoy/symmetric_FIR_Verilog_Implementation
A pipelined Symmetric FIR (Finite Impulse Response) filter implementation in Verilog HDL.
Language: Verilog - Size: 1.43 MB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 1 - Forks: 1
lild4d4/usm_microcontroller_v1
Undergraduate level RISC-V microcontroller
Language: SystemVerilog - Size: 201 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0
afzalamu/8bit-signed-Multiplier-on-Artix7-FPGA
Verilog Code to Implementation on FPGA of 8 Bit Signed Multiplier
Language: Verilog - Size: 3.91 KB - Last synced at: 6 months ago - Pushed at: 6 months ago - Stars: 0 - Forks: 0
afzalamu/8Bit-signed-Full-Adder-on-ARTIX-7-FPGA
Verilog code to implement 8 bit full adder and demonstration of the result on FPGA board.
Language: Verilog - Size: 11.7 KB - Last synced at: 6 months ago - Pushed at: 6 months ago - Stars: 0 - Forks: 0
Akshaya114/T20-Cricket-Game
T20 Cricket Game using Verilog coding. Includes a constraint file for implementing on Nexys A7 FPGA board.
Language: Verilog - Size: 3.22 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
