Topic: "instruction-set-architecture"
Pritjam/pARMesan
A simple CPU architecture specification based on AArch64 and with a little x86 inspiration. Additionally, a C implementation of this architecture and an assembler written in Python.
Language: C - Size: 175 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
einhalv/ocparse
Python module to work with microprocessor instruction sets
Language: Python - Size: 42 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
jracevedob/RISC-ARA Fork of pulp-platform/ara
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
Language: Assembly - Size: 18.7 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
ArvinDelavari/Instruction-Set-Executant
C++ basic instruction set simulator
Language: C++ - Size: 25.4 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 1
iwdgo/processorfeatures
Processor features
Language: Go - Size: 160 KB - Last synced at: 7 days ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
beyzanc/18-bit-processor-implementation-using-logisim
18-bit processor implementation using Logisim
Language: Python - Size: 530 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
mohdfahad12328/scpu
a smiple 8bit cpu implemented in verilog and tested on FPGA for understanding how CPU works
Language: Verilog - Size: 1.77 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
petabite/gomachine
A very basic CPU simulator
Language: Go - Size: 25.4 KB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
Danila-Pechenev/InstructionAnalysisFramework
Framework for collecting and analyzing data on the use of machine instructions
Language: Jupyter Notebook - Size: 230 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 1
Jacopo00811/02135_Introduction_to_Cyber_Systems
02135 Introduction to Cyber Systems Spring 22 DTU
Language: Python - Size: 1.73 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
alphinaud11/Microcontroller-Architecture
An implementation of a custom-designed microcontroller architecture based on Harvard architecture with pipelining
Language: Java - Size: 23.1 MB - Last synced at: about 1 month ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 1
aditiisaxena/Assembler-Simulator
A program that converts assembly code to binary and further simulates it to run the program as required
Language: Python - Size: 88.9 KB - Last synced at: 4 months ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
lthoerner/smis
A project to create a basic instruction set for simple implementation and simple coding.
Language: C - Size: 1.44 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
arorashivoy/CustomAssembler
A assembler and simulator for a custom RISC ISA
Language: Python - Size: 232 KB - Last synced at: almost 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0
pikulet/synacore
synacor challenge
Language: Python - Size: 83 KB - Last synced at: 4 months ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0
kbecke05/CSC225-Computer-Organization
A collection of assembly files written for class assignments
Language: Assembly - Size: 19.5 KB - Last synced at: almost 2 years ago - Pushed at: about 3 years ago - Stars: 0 - Forks: 0
radon-isa/arch
Language: TeX - Size: 51.8 KB - Last synced at: over 2 years ago - Pushed at: about 3 years ago - Stars: 0 - Forks: 0
alejandrogomez314/nand2tetris
A virtual computer build from scratch that can play Tetris: from binary to OOP
Language: Assembly - Size: 685 KB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0
njegos-dukic/Processor-Simulator
Processor Architecture Simulator supporting basic instructions from IS.
Language: C# - Size: 15.6 KB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0
RainingComputers/SRP16
SRP16 is free and open ISA for 16-bit CPUs and Microcontrollers.
Language: C++ - Size: 21.9 MB - Last synced at: 4 months ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0
scarv/chacha-ise
An Instruction Set Extension to accelerate ChaCha on 64-bit platforms, focusing on RISC-V
Language: TeX - Size: 2.4 MB - Last synced at: over 2 years ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0
J0K3Rn/LEGv8-Encoder
Converts LEGv8 instructions to Machine Code
Language: Python - Size: 18.6 KB - Last synced at: over 2 years ago - Pushed at: about 4 years ago - Stars: 0 - Forks: 0
mmatlin/block-8
An 8-bit ISA and CPU implementation in Minecraft.
Language: Python - Size: 18.6 KB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0
moonheart08/SERAIS 📦
Space Efficient RISC Architecture and Instruction Set
Language: Assembly - Size: 164 KB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0
dhanwin247/Computer-Architecture
Computer Architecture mini-projects.
Language: C - Size: 1.17 MB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0
adkl/hack-assembler
Assembler implementation or the Hack computer from the Nand To Tetris course.
Language: Python - Size: 4.88 KB - Last synced at: over 2 years ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0
sid-xyz/RNBIP_Pipelined-Microprocessor
Redesigned the RNBIP single-bus architecture to implement a 3 stage instruction-level pipeline.
Language: Verilog - Size: 231 KB - Last synced at: over 1 year ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0
WeirdJack/APEX-Pipeline-Simulator
7 Stage APEX Pipeline based on instructions flow in a Computer Architecture
Language: C - Size: 15.6 KB - Last synced at: over 2 years ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0
einstein07/HC08-datapath
Implements a datapath which is capable of executing a subset of the Motorola HC08 instruction set on a Field Programmable Gate Array (FPGA).
Language: C - Size: 249 KB - Last synced at: over 2 years ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0
c272/mCTF
An emulator for the mCTF specification, for RACTF 2020.
Language: C# - Size: 64.5 KB - Last synced at: about 1 month ago - Pushed at: about 5 years ago - Stars: 0 - Forks: 0
cagandhi/Context-Switching
A multi-threaded simulation of the process switching mechanism in operating systems. This was my project in the "CSC 340: Operating Systems" course at Ahmedabad University.
Language: C - Size: 2.92 MB - Last synced at: over 2 years ago - Pushed at: about 5 years ago - Stars: 0 - Forks: 0
Fhoughton/ToyVM
A small toy VM and assembler written in python as a learning exercise. Has 3 registers, with storage, maths and printing.
Language: Python - Size: 3.91 KB - Last synced at: almost 2 years ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 0
layman-n-ish/ARM-Arch
Assignments portal for Advanced ARM Architecture at IIIT-B (Fall, 2019)
Language: Assembly - Size: 150 KB - Last synced at: almost 2 years ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 0
brianfakhoury/Fast-Inverse-Square-Root-Magic-Number-Optimization
Testing out optimal magic numbers for the old fast inverse square root function.
Language: Python - Size: 170 KB - Last synced at: almost 2 years ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0
david-palma/mips-32bit-encoder
C implementation of a 32-bit assembly instruction encoder for MIPS processors, designed to convert MIPS assembly instructions into their corresponding machine code formats for execution on MIPS-based systems.
Language: C - Size: 5.86 KB - Last synced at: 4 months ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0
techieforfun/mipsimulator
:control_knobs: Simulator for the Single Cycle MIPS Processor
Language: C++ - Size: 3.44 MB - Last synced at: about 2 years ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 0
RoseLeBlood/virtualSoC
virtual Chip with own instruction set
Language: C# - Size: 30.6 MB - Last synced at: over 2 years ago - Pushed at: almost 8 years ago - Stars: 0 - Forks: 0
yehzhang/x9
9-bit ISA
Language: SystemVerilog - Size: 603 KB - Last synced at: 4 months ago - Pushed at: about 8 years ago - Stars: 0 - Forks: 1
