Topic: "logic-circuits"
theonlyNischal/Ultimate-Notes-Books-Resources-for-NCIT
Curated list of notes, books and other resources for the student of Nepal College of Information and Technology(NCIT) - Pokhara University, Nepal
Language: HTML - Size: 3.87 GB - Last synced at: 13 days ago - Pushed at: 7 months ago - Stars: 286 - Forks: 286
Tractables/LogicCircuits.jl
Logic Circuits from the Juice library
Language: Julia - Size: 4.55 MB - Last synced at: 6 days ago - Pushed at: 11 months ago - Stars: 48 - Forks: 4
SimonBuxx/LogiJS
Discover and create logic circuits
Language: JavaScript - Size: 11 MB - Last synced at: 12 months ago - Pushed at: about 2 years ago - Stars: 40 - Forks: 6
dadler64/Logisim
A continuation of the original Logisim circuit simulator by Carl Burch.
Language: Java - Size: 2.05 MB - Last synced at: over 1 year ago - Pushed at: about 4 years ago - Stars: 9 - Forks: 2
kkirss/vcb-riscv
Virtual Circuit Board RISC-V
Language: C++ - Size: 41.3 MB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 8 - Forks: 0
nthparty/circuitry
Embedded domain-specific combinator library for the abstract assembly and automated synthesis of logical circuits.
Language: Python - Size: 157 KB - Last synced at: 27 days ago - Pushed at: about 2 years ago - Stars: 7 - Forks: 1
Thuffir/6502
Simple 6502 / 65C02 implementation
Language: C - Size: 386 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 3 - Forks: 2
hosseinfani/digital_odyssey
Materials for the Computer Science course, Digital Design (Logic Circuits)
Language: C++ - Size: 393 MB - Last synced at: over 1 year ago - Pushed at: about 3 years ago - Stars: 3 - Forks: 4
KimiaMontazeri/Smart-Parking-System
My logic circuits course project at AUT
Language: Verilog - Size: 4.58 MB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0
Abd-ELrahmanHamza/Serial-Peripheral-Interface
Design and implement the following components of the SPI modules using Verilog such that they match the requirements of the development testbench and match the SPI specifications: Master-Slave Self-Checking Testbenches for the Master and Slave
Language: Verilog - Size: 1.58 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 3
VarshithGovi/Half-Subtractor-Design-Verilog
Gate-level implementation of a half-subtractor using Verilog, featuring a comprehensive testbench, truth table validation, and waveform analysis for beginners in digital design.
Language: Verilog - Size: 20.5 KB - Last synced at: 2 months ago - Pushed at: 2 months ago - Stars: 0 - Forks: 0
VarshithGovi/Full-Adder-Design-Verilog
Gate-level implementation of a full-adder using Verilog, complete with a testbench, truth table validation, and waveform analysis for beginners in digital logic design.
Language: Verilog - Size: 11.7 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0
Arsham-LH/Logic-Circuits
Simulation of logic circuits using Verilog, Proteus and other tools.
Language: Verilog - Size: 2.88 MB - Last synced at: about 2 months ago - Pushed at: 8 months ago - Stars: 0 - Forks: 0
mehmetakifkoz/MARS-Web-App
This repository contains the CENG3010 Computer Organization course projects. The first project involves developing a GUI-based 32-bit MIPS simulator, while the second project centers on designing a custom 16-bit MIPS-like processor with a unique instruction set.
Language: JavaScript - Size: 25.4 KB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0
vinimiraa/AC-I
Repositório da matéria de Arquitetura de Computadores 1 com o Professor Theldo Cruz Franqueira
Language: Verilog - Size: 289 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0
MahdiHaeri/Verilog_Logic_Circuit
Logic Circuit module Implementation with Verilog
Language: Verilog - Size: 27.3 KB - Last synced at: 12 months ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
EngenhariaSoftwarePUCRS/Fundamentos_de_Sistemas_Computacionais
| Fundamentos de Sistemas Computacionais | Sergio Johann Filho | 2º | 2022/2 | 7.6 | 98800-04 | 60 |
Language: Assembly - Size: 4.83 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
hwnginsoict/OOP_Project_Group-10_Topic-9 Fork of lehieulol/OOP.20222.10
Logic expression normalization is an important step to reduce the original expression into a canonical normal form with fewer number of terms and operations. This way, the same expression can be implemented using fewer logic gates which means higher reliability and lower manufacturing cost
Language: Java - Size: 13.5 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0
WildPixelGames/spaghetti
Logic simulator with graphical editor
Language: Rust - Size: 34.2 KB - Last synced at: about 2 months ago - Pushed at: about 3 years ago - Stars: 0 - Forks: 0
Abd-ELrahmanHamza/ALU
Design and implementation an arithmetic unit that is capable of adding, subtracting, and multiplying two signed magnitude numbers, and displays the result of the operation performed along with some additional flags regarding the operation and the result using Logisim.
Size: 1.29 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 3
Geomon-Joshy/n_bit_subtraction
subtraction of two n_bit numbers using Qiskit
Language: Python - Size: 41 KB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0
AUT-CE-Archive/AUT-CE-LC 📦
A repository for Logic Circuits course in Amirkabir University of Technology
Language: C - Size: 139 MB - Last synced at: about 2 years ago - Pushed at: about 4 years ago - Stars: 0 - Forks: 1
ahmedkrmn/Digital-Logic-Circuits-Analyzer
Analyze images of digital logic circuit schemes and automatically generate their truth tables.
Language: HTML - Size: 9.59 MB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0
