hdl-eda/digital-ic-design-lab

Here Digital IC Design Lab topics are covered to meet OU syllabus.

Language: Verilog - Size: 964 KB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 6 - Forks: 1

soham9284/Vedic-Multiplier-using-CMOS-design

Transistor-level design, simulation, and layout of a 2-bit Vedic multiplier using CMOS technology with netlist and layout optimization.

Size: 13.7 KB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 0 - Forks: 0

soham9284/CMOS

This repository contains all of my lab work for the course CMOS at IIITN.

Size: 278 KB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 0 - Forks: 0

FarhanTips/VLSI-Design

This repository covers VLSI Design concepts using Microwind, Quartus, and Waveforms, focusing on digital circuit design, FPGA implementation, and HDL for integrated circuit development.

Size: 932 KB - Last synced at: 2 months ago - Pushed at: 2 months ago - Stars: 0 - Forks: 0

Jjateen/7T-SRAM-MCPL

This project showcases the design and simulation of a 7T MCPL SRAM using adiabatic logic for low-power efficiency, developed for ECL 312 at IIIT Nagpur. It compares the 6T and 7T SRAM designs in terms of power, energy, and stability, with simulations done in WinSpice and Microwind.

Language: SystemVerilog - Size: 3.62 MB - Last synced at: 3 months ago - Pushed at: 6 months ago - Stars: 0 - Forks: 0

gundasrikar/Sleepy-Keeper-FPGA-XILINX

Size: 1.95 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

jubayer98/Some-Basics-VLSI-CHIP-Design-And-Simulation-Using-Microwind-Tool

In this repository, there are designs and simulations for VLSI chip projects based on simple CMOS logic circuits and gates, created using the Microwind tool.

Size: 6.84 KB - Last synced at: 3 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0

SaiVarshit/Digital-circuit-Simulation-in-Cadence-Microwind-and-NGspice

A practical Introduction to simulation software's

Size: 2.26 MB - Last synced at: 11 months ago - Pushed at: 11 months ago - Stars: 0 - Forks: 0

conquerorcj26/2to1_MUX_using_CMOS_in_Microwind

2:1 MUX Layout & Simulation using CMOS Logic in Microwind

Size: 0 Bytes - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

iloudaros/VLSI-lab

These are the lab exercises of the VLSI Lab of CEID

Size: 76.9 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

Jash-2000/Analog-and-Digital-VLSI-Design

Simulation projects on VLSI design.

Language: HTML - Size: 15.9 MB - Last synced at: about 2 years ago - Pushed at: about 4 years ago - Stars: 2 - Forks: 1

KameliaZaman/VLSI-Lab

VLSI Circuits Design Laboratory works using DSCH2 and Microwind2

Size: 2.18 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

Rafsan7238/CSE460_Labs

This repo contains the lab files for my CSE460: VLSI course at BracU, written in VHDL, DHCP and MicroWind.

Language: HTML - Size: 12 MB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 2 - Forks: 1

MuntahaShams/simulations

this repo contain simulations of various circuits

Size: 13.7 MB - Last synced at: 3 months ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 1