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GitHub topics: soc-verification

williaml33moore/bathtub Fork of everactive/bathtub

BDD Gherkin implementation in native SystemVerilog, based on UVM.

Language: SystemVerilog - Size: 7.61 MB - Last synced at: 7 months ago - Pushed at: 7 months ago - Stars: 2 - Forks: 0

akzare/HardORB

TCP/IP and UDP/IP protocol stack off-loading

Language: Verilog - Size: 59.6 KB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 9 - Forks: 1

Related Keywords
soc-verification 2 tcpip-offloading 1 fpga-accelerator 1 verilog-hdl 1 verilog 1 uvm-verification 1 uvm 1 systemverilog 1 soc-design 1 rtl-design 1 rtl 1 fpga 1 design-verification 1 bdd-specs 1 bdd-framework 1 bdd 1 asic-verification 1 asic-design 1 asic 1