GitHub topics: verilog-library
SymbiFlow/sphinx-verilog-domain
Sphinx domain to allow integration of Verilog / SystemVerilog documentation into Sphinx.
Language: Python - Size: 17.4 MB - Last synced at: about 1 month ago - Pushed at: over 4 years ago - Stars: 25 - Forks: 7
Wissance/QuickRS232
A versatile full-duplex RS232 FPGA module with internal FIFO buffer on RX
Language: Verilog - Size: 739 KB - Last synced at: 7 months ago - Pushed at: about 1 year ago - Stars: 2 - Forks: 0
janFrancoo/Verilog-Lib
My verilog code store & examples
Language: Verilog - Size: 6.43 MB - Last synced at: over 1 year ago - Pushed at: over 5 years ago - Stars: 1 - Forks: 0
a3510377/verilog-library
A very simple Verilog library, including Verilog and Symbol
Language: Verilog - Size: 1.48 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0
IzyaSoft/EasyHDLLib
A coocbook of HDL (primarily Verilog) modules
Language: Verilog - Size: 315 KB - Last synced at: 7 months ago - Pushed at: over 8 years ago - Stars: 6 - Forks: 0
jefflieu/recon
The RECON project creates library for Nios II Microcontroller System and Tool chain. The library includes a collection of hardware configurations and Arduino-style software APIs.
Language: Verilog - Size: 1.89 MB - Last synced at: 4 months ago - Pushed at: almost 7 years ago - Stars: 21 - Forks: 4
cpehle/dpi_comm
Bidirectional DPI-C communication over sockets.
Language: C++ - Size: 2.93 KB - Last synced at: 7 months ago - Pushed at: almost 7 years ago - Stars: 0 - Forks: 0