GitHub topics: rmii
jakubcabal/rmii-firewall-fpga
RMII Firewall FPGA
Language: VHDL - Size: 98.6 KB - Last synced at: 2 days ago - Pushed at: almost 6 years ago - Stars: 24 - Forks: 3
libdriver/lan8720
LAN8720 full-featured driver library for general-purpose MCU and Linux.
Language: C - Size: 5.61 MB - Last synced at: 2 months ago - Pushed at: 5 months ago - Stars: 30 - Forks: 9
0xArt/Passe_Passe_Network_Switch
A FPGA layer 2 network switch with the unique ability of having virtual ports that can transmit and receive UDP data.
Language: SystemVerilog - Size: 291 KB - Last synced at: 6 months ago - Pushed at: 6 months ago - Stars: 6 - Forks: 1
SoCXin/AT32F407
L5 R4: arterytek Cortex-M4 240MHz MCU (AT32F407)
Language: C - Size: 13.6 MB - Last synced at: 5 months ago - Pushed at: about 4 years ago - Stars: 3 - Forks: 1
WangXuan95/FPGA-RMII-SMII
An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII，用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。
Language: Verilog - Size: 289 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 43 - Forks: 12
ilyajob05/verilog_modules
verilog modules
Language: Verilog - Size: 27.3 KB - Last synced at: over 2 years ago - Pushed at: over 5 years ago - Stars: 8 - Forks: 2
MasterPlayer/rmii-ethernet-mac
RMII interface ethernet MAC Core for 10/100 MBit ethernet implementation with support CDC and AXI-Stream BUS without management and without MDIO interface support
Language: VHDL - Size: 79.1 KB - Last synced at: over 2 years ago - Pushed at: over 3 years ago - Stars: 6 - Forks: 0
