GitHub topics: sta
Silicon-Highway-Technologies/Si-Time
Silicon Highway Technologies Free STA, ASTA Timing Engine
Language: Makefile - Size: 32.1 MB - Last synced at: 2 days ago - Pushed at: 4 months ago - Stars: 2 - Forks: 0
Sanjeen1/Static-timing-analysis-with-OpenSTA-tool
A complete workflow for performing static timing analysis using the open-source OpenSTA tool on a synthesized digital design. Includes constraint setup (.sdc), open source library file sky130/nangate45 (.lib), Synthesized Verilog file (.v) and generation of detailed timing reports for setup and hold analysis. Slack calculation.
Language: Verilog - Size: 16.2 MB - Last synced at: 30 days ago - Pushed at: 30 days ago - Stars: 0 - Forks: 0
efabless/openlane2
The next generation of OpenLane, rewritten from scratch with a modular architecture
Language: Python - Size: 31.4 MB - Last synced at: about 2 months ago - Pushed at: 6 months ago - Stars: 305 - Forks: 65
OpenTimer/OpenTimer
A High-performance Timing Analysis Tool for VLSI Systems
Language: Verilog - Size: 329 MB - Last synced at: 2 months ago - Pushed at: 2 months ago - Stars: 633 - Forks: 159
verilog-to-routing/tatum
Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
Language: C++ - Size: 2.09 MB - Last synced at: 2 months ago - Pushed at: over 1 year ago - Stars: 62 - Forks: 11
zjunlp/steer-target-atoms
[ACL 2025] Beyond Prompt Engineering: Robust Behavior Control in LLMs via Steering Target Atoms
Language: Python - Size: 410 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 7 - Forks: 1
chunhuajiang/esp32-projects
ESP32 好玩、有趣、实用的项目
Language: C - Size: 631 KB - Last synced at: 3 months ago - Pushed at: over 8 years ago - Stars: 215 - Forks: 82
KAMATHAM19/RTL2GDS
This project focuses on the design, verification, and physical implementation (RTL to GDSII) of full adder circuits using two architectural approaches: flat and hierarchical design methodologies. The entire digital ASIC flow is executed using Synopsys EDA tools, targeting a 32nm CMOS technology node.
Size: 214 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0
vlsiexcellence/Static-Timing-Analysis-Full-Course
Static Timing Analysis Full Course
Size: 8.25 MB - Last synced at: 3 months ago - Pushed at: over 2 years ago - Stars: 56 - Forks: 13
moocf/wifi_apsta.esp32
Start WiFi in AP and station mode and scan APs.
Language: C - Size: 9.77 KB - Last synced at: 4 months ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0
moocf/wifi_sta.esp32
Setup WiFi as a station and connect to AP.
Language: C - Size: 10.7 KB - Last synced at: 5 months ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0
ogcincubator/bblocks-sta
OGC Location Building Blocks for SensorThings API
Language: HTML - Size: 893 KB - Last synced at: 6 months ago - Pushed at: 6 months ago - Stars: 0 - Forks: 1
akiitr/asic
This repository encompasses all aspects of Hardware ASIC design, From RTL to GDS II, including Verilog, Synth, PD and Signoff (STA, PDN, etc.)
Language: Ruby - Size: 188 KB - Last synced at: 8 months ago - Pushed at: 8 months ago - Stars: 0 - Forks: 0
masoudir/ESP_UDP_Bridge
Ceates a bidirectional link between UDP sockets and Serial port via ESP8266
Language: C++ - Size: 625 KB - Last synced at: 2 months ago - Pushed at: almost 5 years ago - Stars: 3 - Forks: 0
ubyhzargam/OpenSTA
Timing reports are generated for various circuits using an open source tool OpenSTA. Both min and max timing reports are generated. The commands are given using a tcl script and I have used a 45nm pdk for technology mapping. The circuit is described using Verilog language. We can also generate or report power dissipated by design. MMMC is performed
Language: Verilog - Size: 56.6 KB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 1
panastasiadis/soc-verification-with-cad-tools
This repository is about the main project of the course "VLSI System Design". This course is a part of the undergraduate studies of University of Thessally - ECE Department located in Volos, Greece.
Language: Verilog - Size: 8.72 MB - Last synced at: 10 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0
KAMATHAM19/RTL-to-GDSII-ASIC-design-of-Counter
The objective is to take a simple counter design from the RTL (Register Transfer Level) stage to the GDSII format using Cadence tools with a 90nm Process Design Kit (PDK).. The tools used in this process include Xcelium for simulation and coverage analysis, Genus for synthesis, Innovus for physical design, and Pegasus/PVS for physical verification.
Language: Tcl - Size: 56.6 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0
OpenTimer/Parser-SPEF
A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
Language: C++ - Size: 63.4 MB - Last synced at: about 1 year ago - Pushed at: about 3 years ago - Stars: 50 - Forks: 23
christus/OCS_QDE
environ
Language: TypeScript - Size: 1.3 GB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0
StateTagApps/vue
State Tag Application in Vue.js
Language: JavaScript - Size: 3.19 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 1
codebydant/esp32-client-server-library
This is a C program for the esp32 using ESP_IDF framework for the ap and sta wifi modules.
Language: C - Size: 32.2 KB - Last synced at: 8 months ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 1
ghassensta/portfolio
portfolio
Language: CSS - Size: 148 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
michael-dev/ebtables-dhcpsnooping
Linux generic dhcp snooping daemon using nflog and ebtables or nftables
Language: C - Size: 347 KB - Last synced at: almost 2 years ago - Pushed at: almost 3 years ago - Stars: 50 - Forks: 15
filippofinke/sta-parser
⚙️ A Sensor Things API parser
Language: Python - Size: 1.09 MB - Last synced at: 3 months ago - Pushed at: about 2 years ago - Stars: 2 - Forks: 0
data2health/DREAM-Challenge
EHR DREAM Challenge
Size: 2.62 MB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 5 - Forks: 2
StateTagApps/www
Public website about State Tag Applications.
Language: HTML - Size: 461 KB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0
StateTagApps/info
Learn to build a State Tag Application (STA).
Language: HTML - Size: 1.2 MB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0
arpit306/VSD-IAT-Sign-off-Timing-Analysis-Basics-to-Advanced
In this workshop we studied the concepts involved in STA from basics to advanced, with the help of open source STA tools and libraries.
Size: 54.7 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
mo-tark/ezsta-search
Search Webpage for EZSTA Mappings
Language: Vue - Size: 311 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
DataCoveEU/SensorThings
SensorThings work at DataCove
Size: 58.6 KB - Last synced at: over 1 year ago - Pushed at: over 6 years ago - Stars: 4 - Forks: 0
vsdip/vsdflow
VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using VSD (RTL-to-GDS) FLOW. VSDFLOW is completely build using OPHW tools, where the user gives input RTL in verilog. From here on the VSDFLOW takes control, RTL is synthesized (using Yosys).
Language: Coq - Size: 13.1 MB - Last synced at: over 2 years ago - Pushed at: about 5 years ago - Stars: 7 - Forks: 1
Brand-Frank/STM32-ALK8266
毕业设计代码【规范版本】
Language: C - Size: 3.38 MB - Last synced at: over 2 years ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0
MahAmorim/PetStore_Iterasys
Criação de projeto durante a semana da automação de teste de API 2021 da Iterasys
Language: Java - Size: 104 KB - Last synced at: 7 months ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0
desmondlzy/timewalk-core
Free and extensible software that helps you keep track of you coding statistics
Language: Python - Size: 844 KB - Last synced at: over 2 years ago - Pushed at: over 5 years ago - Stars: 11 - Forks: 0
DataCoveEU/INSPIRE-STA-Good-Practice
Extending INSPIRE to the IoT through SensorThingsAPI
Size: 7.81 KB - Last synced at: over 2 years ago - Pushed at: about 5 years ago - Stars: 0 - Forks: 0
abranhe/sta
Parse tokens from an string into an array
Language: Python - Size: 4.88 KB - Last synced at: 6 months ago - Pushed at: about 7 years ago - Stars: 2 - Forks: 0
