GitHub topics: synthesize
JeffDeCola/my-verilog-examples
A place to keep my synthesizable verilog examples.
Language: Verilog - Size: 13.7 MB - Last synced at: 2 months ago - Pushed at: 2 months ago - Stars: 36 - Forks: 11
modavis-project/midiAuralizer
GUI to render MIDI Files through VST Instruments with an extended Protocol.
Language: Python - Size: 538 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 3 - Forks: 1
Related Keywords
synthesize
2
vsti
1
vst
1
render
1
pyqt
1
midi
1
instrument
1
gui
1
export
1
convert
1
auralize
1
audio
1
xilinx
1
waveform
1
vivado
1
verilog-simulator
1
verilog
1
systemverilog
1
synthesis
1
simulator
1
iverilog
1
hdl
1
hardware-description-language
1
hardware-architecture
1
hardware
1
gtkwave
1
fpga
1
asic-design
1
asic
1