Kampi/OV7670

FPGA interface and driver for an OV7670 camera sensor.

Language: VHDL - Size: 31.3 KB - Last synced at: about 5 hours ago - Pushed at: almost 2 years ago - Stars: 1 - Forks: 1

MEVIUS-FPT/hls_traffic_light_recognition

Traffic Light Recognition with High-Level Synthesis

Language: C++ - Size: 22.5 KB - Last synced at: 8 days ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 2

kodachi77/DE10liteDhrystone

Nios II Embedded System Dhrystone Test

Language: C - Size: 1.31 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

nmigen1/nmigen-soc

nmigen-soc - System on Chip toolkit for nMigen - MIRRORED - https://gitlab.com/nmigen/nmigen-soc/

Language: Python - Size: 126 KB - Last synced at: over 2 years ago - Pushed at: almost 3 years ago - Stars: 1 - Forks: 0

JoseDavidSS/CE_Architecture1.ASIP-Image_Interpolation Fork of juanignava/ComputerArchitecture1.Project2

Segundo proyecto para el curso de Arquitectura de Computadores. La idea es hacer un ASIP (Application Specific Set Processor) que genere interpolación de imagen por medio de un compilador, código en ensamblador, un procesador pipeline y scripts en alto nivel.

Language: Python - Size: 60.1 MB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

AhmedERady/Grad_Project

Smart Automation Controller for Precision Agriculture

Language: V - Size: 124 MB - Last synced at: about 1 month ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

marco-pag/fred-linux

Experimental implementation of FRED for Linux.

Language: C - Size: 246 KB - Last synced at: 12 months ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 4

davemuscle/camera_journey

Various lessons learned while designing an OV5640 camera display in VHDL/Embedded Linux on a Cyclone V SOC board

Language: VHDL - Size: 53.9 MB - Last synced at: over 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 0

ismailfaruk/ECSE324--Computer-Organization

Academic projects created using Assembly, in the Intel FPGA Monitor Program, for the laboratory work done while attending the McGill Course ECSE 324 Computer Organization

Language: Assembly - Size: 8.95 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 3

Gabriele-bot/PYNQ_IA

Repository that contains some neural network inferences on PYNQ-Z2 board employing hls4ml

Language: Ada - Size: 233 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 1

richardbenstead/ebaz4205

Projects using ebaz4205 Zynq board

Language: HTML - Size: 495 KB - Last synced at: almost 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 0

jagkush/ZYNQ_based_traffic_light_controller

A final project for FPGA_SOC course

Language: HTML - Size: 34.8 MB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 1 - Forks: 0

HawkPhantom/FPGA-Sorting

This Repo includes C++ codes, Verilog IPs and Complete Zynq applications of sorting algorithms.

Language: C++ - Size: 1.03 MB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0

cmcquinn/replicookie

A 3D printer controller board based around the Snickerdoodle development board.

Language: Shell - Size: 13.1 MB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 1

pedrovt/cr-square-root-cop

A FPGA Based Square Root Approximation Coprocessor

Language: VHDL - Size: 220 MB - Last synced at: almost 2 years ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 1

fmhess/fmh_framebuffer

A VHDL rotating framebuffer with an Avalon ST Video output.

Language: VHDL - Size: 61.5 KB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 1

jonakor/ZedBoard_prototyping

Hardware .tcl code and software .c code for ZedBoard prototyping

Language: C - Size: 71.3 KB - Last synced at: almost 2 years ago - Pushed at: about 5 years ago - Stars: 1 - Forks: 0

mavalderrama/master_thesis_manuscript

Masters Thesis Manuscript LATEX

Language: TeX - Size: 20.7 MB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 1 - Forks: 1

mavalderrama/master_thesis_presentation

Master Thesis Presentation LATEX

Language: TeX - Size: 12.3 MB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 1 - Forks: 0

snyderth/SCARA_robot

A SCARA topoology robotic arm

Language: Python - Size: 390 MB - Last synced at: almost 2 years ago - Pushed at: about 5 years ago - Stars: 1 - Forks: 0

pronoym99/AHWR-Interlock

Language: VHDL - Size: 14.6 MB - Last synced at: about 1 year ago - Pushed at: almost 6 years ago - Stars: 1 - Forks: 0

feddischson/de0_led_example

A very small example project for the Terasic DE0 SOC board.

Language: Makefile - Size: 4.88 KB - Last synced at: almost 2 years ago - Pushed at: over 6 years ago - Stars: 1 - Forks: 3

HuangDave/MIPS

Single-Cycle and 5-stage Pipelined SoC

Language: Verilog - Size: 44.3 MB - Last synced at: over 2 years ago - Pushed at: about 7 years ago - Stars: 1 - Forks: 0

ikwzm/FPGA-SoC-U-Boot-ZYBO

U-Boot image for ZYBO

Language: Shell - Size: 1.15 MB - Last synced at: 7 days ago - Pushed at: about 7 years ago - Stars: 1 - Forks: 0

feddischson/de0_hps_example

Examples for the Terasic DE0-nano-SOC board

Language: Makefile - Size: 51.8 KB - Last synced at: almost 2 years ago - Pushed at: about 7 years ago - Stars: 1 - Forks: 0

sgq995/rc4-de0-nano-soc

It's a cryptoprocessor that implements de RC4 algorithm

Language: SystemVerilog - Size: 76.9 MB - Last synced at: 3 months ago - Pushed at: about 8 years ago - Stars: 1 - Forks: 1

pokitoz/DE0_SoC_altera_config

Language: C - Size: 133 KB - Last synced at: over 1 year ago - Pushed at: almost 9 years ago - Stars: 1 - Forks: 1

leastrobino/acoustic-levitation

Acoustic levitation on SoC FPGA (DE0-Nano-SoC) https://youtu.be/p1Vm4cL4aUA

Last synced at: over 2 years ago - Stars: 1 - Forks: 2

HANANDA1/FPGA-Based-Smart-Car-Security-System

FPGA-Based Smart Car Security System is a robust solution for protecting high-end vehicles like Porsche. It uses Verilog and SystemVerilog to detect unauthorized access and disable the fuel pump, ensuring your car remains secure. 🛠️🚗

Language: Verilog - Size: 9.27 MB - Last synced at: 5 days ago - Pushed at: 5 days ago - Stars: 0 - Forks: 0

RickBarretto/laplace-mpu-v2 Fork of cldaniel101/pbl2-sistemas-digitais

Matrix Processing Unit (MPU) + Assembly Library + C user Application for Digital Systems PBL of 2025.1

Language: Verilog - Size: 5.07 MB - Last synced at: about 3 hours ago - Pushed at: 6 days ago - Stars: 0 - Forks: 0

Awais-Asghar/FPGA-Based-Smart-Car-Security-System

A Smart Anti-Theft Car Security System implemented on FPGA to detect and prevent unauthorized access. The system uses real-time monitoring and control logic to enhance vehicle safety and response.

Language: Verilog - Size: 9.35 MB - Last synced at: 8 days ago - Pushed at: 8 days ago - Stars: 0 - Forks: 0

Jjateen/RISC-V-SoC

This repository contains a custom RISC-V-based System-on-Chip (SoC) implemented on the Tang Nano 9K FPGA. It utilizes PicoRV32 and FemtoRV32 cores along with UART communication and runs a dedicated firmware.

Language: F# - Size: 1.48 MB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

TahirZia-1/UART-Transmitter-and-Receiver

A complete UART (Universal Asynchronous Receiver/Transmitter) implementation for FPGAs, written in Verilog HDL. This project includes transmitter and receiver modules, baud rate generation, and test infrastructure for both simulation and hardware validation.

Language: SystemVerilog - Size: 231 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

TahirZia-1/Digital-Clock-Verilog

This repository contains a Verilog implementation of a 24-hour digital clock designed for FPGA platforms. The design displays hours, minutes, and seconds on a 7-segment display, providing a complete timekeeping solution that can be easily integrated into various FPGA development boards.

Language: Tcl - Size: 166 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

calvinee/FPGA-Technology-Weekly

分享FPGA相关的新闻，好技术文章，博客和项目，帮助大家入门FPGA系统开发，和工作创业交流。Share FPGA-related news, quality technical articles, blogs, and projects to help everyone get started with FPGA system development and exchange ideas on work and entrepreneurship.

Size: 14.6 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

dan-lara/FPGA-Ultrasonic-2D-Radar

Language: C - Size: 21.5 MB - Last synced at: 5 months ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0

alinja/alpus_wb

VHDL implementation of Pipelined Wishbone B4 interconnect

Language: VHDL - Size: 13.7 KB - Last synced at: 6 months ago - Pushed at: 6 months ago - Stars: 0 - Forks: 0

CNES/LoCod

An open-source hw/sw co-design framework for heterogeneous chips

Size: 3.91 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

Johnritaa/SmartFusion2-UART-demo

demo program for SmartFusion2 FPGA SOC

Size: 12.3 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

3-o-3/cod5

Public Domain (⊄) Computer on FPGA

Language: C - Size: 87.5 MB - Last synced at: about 12 hours ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

vrstanchev/gnu-fpga-exersises

VHDL fpga exersises with Free/FOSS/Libre tools

Language: VHDL - Size: 17.6 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

esantosjr/FPGA-Function-Acceleration

Accelerating a simple function using an IP Block in the FPGA.

Language: Tcl - Size: 2.13 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

ngrabbs/arm_projects

ARM single cycle processor on nandland.com go-board

Language: SystemVerilog - Size: 20.9 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

yilmaz0734/FPGATictactoegame

In this project, we implemented a different kind of a tic tac toe board game that is played on an FPGA board using its push buttons. We used Verilog HDL to code the project and implemented a VGA interface for visualization.

Language: Verilog - Size: 22.8 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

anchaides/docker-arm-gnuabihf-de1-soc

Helps with Cross compilation for arm-gnueabihf-gcc linux compilation for the HPS found in cyclone V subsystems on DE1-SOC boards.

Language: Dockerfile - Size: 14.6 KB - Last synced at: 12 months ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

AhmedAbdelaal2001/Advanced-Encryption-Standard

A full hardware implementation of the AES using Verilog, supporting SPI communication between all modules.

Language: Verilog - Size: 22.5 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

avlad98/Hybrid_CPU_FPGA_DisertationProject

[Disertation Project] Hybrid CPU and FPGA image processing on a Zybo Z7-10 SoC (Zynq7000) from Xilinx

Language: VHDL - Size: 267 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

duclos-cavalcanti/microsemi-error-detection

Error Correction and Detection using Microsemi's SmartFusion2 Kit, FPGA, SoC

Language: C - Size: 35.1 MB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

avikram2/PacmanFPGA

ECE 385 Final Project on DE-10 FPGA Board with NIOS 2 SoC: Implementing PacMan

Language: Verilog - Size: 482 MB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

messes2/ECE-385-Final-project

I made a motion controlled digital synthesizer known as a puppeteer theremin that uses AI to get motion control data from a server hosted on a phone onto an FPGA.

Language: SystemVerilog - Size: 9.49 MB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

falsestatement/GeoDashFPGA

This is a very basic replication of the popular rhythm / platformer game Geometry Dash, implemented completely in hardware through System Verilog

Language: Verilog - Size: 34.4 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

mohamedtareq24/ODE_solver_NIOS_II

NIOS II controlled hardware ODE solver implemented on Cyclone IV FPGA

Language: Verilog - Size: 884 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

kelhuynh/MECHTRON-3TB4-Labs

3TB4-Embedded Systems II

Language: SystemVerilog - Size: 90.1 MB - Last synced at: over 2 years ago - Pushed at: about 3 years ago - Stars: 0 - Forks: 0

SakaSerbia/FPGA-DE10-Standard-Project-Nios2-DMA-Accelerator

Develop DMA acceleration of the system that performs linear computing functions, Y = AX + B, large amounts of data.

Size: 18.6 KB - Last synced at: about 1 year ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

SakaSerbia/FPGA-DE10-Standard-Simple-Nios2-Project

Designing a simple processor system on FPGA. This is demo project to test FPGA DE10-Standard and develop a simpe Nios2 app.

Language: Verilog - Size: 1.37 MB - Last synced at: about 1 year ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

lazuardinfl/Tic-tac-toe-FPGA

Tic-Tac-Toe with SoC FPGA

Language: VHDL - Size: 25.3 MB - Last synced at: over 1 year ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

jarios86/marex

MAREX: P-System hardware processor

Language: VHDL - Size: 1.51 MB - Last synced at: 3 months ago - Pushed at: about 4 years ago - Stars: 0 - Forks: 0

TotoroTron/Pong

Arcade pong on a 32x32 LED matrix.

Language: VHDL - Size: 4.55 MB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0

HaydenGoodfellow/ECE241

Projects from a second-year computer engineering course on digital logic (written in Verilog)

Language: Verilog - Size: 40.3 MB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0

HaydenGoodfellow/ECE243

Projects from a second-year computer engineering course on computer organization (written in C, Assembly (ARMv7-A), and Verilog)

Language: Assembly - Size: 21.4 MB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0

imciner2/cmake-embedded-toolchains

CMake toolchains and files for developing embedded systems, including ARM, FPGA and SoC devices

Language: CMake - Size: 4.88 KB - Last synced at: 3 months ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 0

micro-FPGA/MEGA65-Hacks

Hacks and non standard things with MEGA65 Computer

Size: 39.1 KB - Last synced at: over 2 years ago - Pushed at: almost 6 years ago - Stars: 0 - Forks: 0

0xD503/I2C-Interface

I2C Interface RTL description

Language: SystemVerilog - Size: 3.91 KB - Last synced at: about 2 years ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0

0xD503/Digital-music-project

Laboratory work project

Language: SystemVerilog - Size: 196 KB - Last synced at: about 2 years ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0

0xD503/SPI-Interface

SPI Interface RTL Description

Language: SystemVerilog - Size: 1000 Bytes - Last synced at: about 2 years ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0

tanmayv25/Microprocessor-System-Design

Contains the lab work of Microprocessor System Design. All the FPGA prototyping, Drivers and OS modules.

Size: 1.1 MB - Last synced at: 10 days ago - Pushed at: over 6 years ago - Stars: 0 - Forks: 0

jorenvandeweyer/soclab_project

Language: Verilog - Size: 4.81 MB - Last synced at: over 1 year ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 0

romanmashta/mini186_SoC

Language: Verilog - Size: 310 KB - Last synced at: about 1 year ago - Pushed at: over 7 years ago - Stars: 0 - Forks: 2

AbedYassine/ece1373mclightprop

A MonteCarlo light propagation algorithm on a Xilinx FPGA using High Level Synthesis.

Language: C - Size: 2.89 MB - Last synced at: almost 2 years ago - Pushed at: about 8 years ago - Stars: 0 - Forks: 0