GitHub topics: halfadder
mahdizynali/verilog-digital-circuit-codes
simple verilog digital circuits sampels (halfAdder, fullAdder, ALSU , ...)
Language: Verilog - Size: 13.7 KB - Last synced at: 3 months ago - Pushed at: almost 2 years ago - Stars: 8 - Forks: 1

shahed22/Dadda-8-bit
The computational speed of the dadda multiplier can be enhanced by partitioning the partial products. In process to achieve low power we have considered pass transistor for logical implementation.
Language: Verilog - Size: 11.7 KB - Last synced at: 12 months ago - Pushed at: 12 months ago - Stars: 0 - Forks: 0

CodiieSB/VHDL-Half_Adder
A half adder is a digital circuit that performs addition of two binary digits, generating the sum bit and the carry bit.
Language: VHDL - Size: 66.4 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

gautamop01/Digital-Systems-and-Design
Learned as a part of CS210 course
Language: VHDL - Size: 16.6 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

bedriyorulmaz/Verilog-VHDL-PROJECT
Language: VHDL - Size: 27.4 MB - Last synced at: about 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

hidrogencloride/verilog-halfAdder
Hardware Simulation using Icarus Verilog EDA Playground for a half adder circuit design and test bench.
Language: SystemVerilog - Size: 2.93 KB - Last synced at: about 2 years ago - Pushed at: about 8 years ago - Stars: 1 - Forks: 0

MariosAntn/verilog-FullAdder-using-HalfAdder
Language: Coq - Size: 2.93 KB - Last synced at: almost 2 years ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 0

JoaoBLeite/LogicCircuit
Some logic circuits for studies and reviews
Size: 249 KB - Last synced at: almost 2 years ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0
