Daniyar1239/Electronic-dice-and-counter

Electronic dice, two-bit adder and counter made from logic gates in Multimedia Logic software

Size: 349 KB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

Airbus5717/coe202

Language: CSS - Size: 13.8 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

saifmohammednipun/dgital-logic-design-lab

This repository contains the lab works of Digital Logic Design (DLD) Course.

Size: 3.14 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

nevikw39/LogicDesign

11020EECS101002

Language: Verilog - Size: 1.28 MB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

ShivangMishra/logic-design

logic design and digital circuits mini project

Language: Java - Size: 1000 Bytes - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

MohammadmehdiKhani/traffic-light

Controlling a simple traffic light system.

Language: Verilog - Size: 813 KB - Last synced at: almost 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

ysntrkc/AssemblyToHex

This is our digital logic design project. The java program takes assembly code and converts it to hexadecimal code. And hex code is input for our Logisim circuit's instraction memory file. Logisim circuit runs the instructions and modify registers and data memory.

Language: Java - Size: 556 KB - Last synced at: almost 2 years ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0

SM2A/Digital_Logic_Design_Course_Projects

🎓💻University of Tehran Digital Logic Design Course Projects - Fall 2020

Language: Verilog - Size: 2.32 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0

mhamza-ali/MERL-Training

This repository contains all the stuff that I have learned at MERL-UIT during the training session. This is available for everyone so you can check that out for learning stuff as well.

Language: Assembly - Size: 4.14 MB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0

HsuChiChen/logic-design

sequence detector with overlapped 2 patterns 010111 or 1101

Language: Verilog - Size: 13.5 MB - Last synced at: almost 2 years ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0

ashababnoor/Digital-Logic-Design

Digital logic designs made with Logisim

Size: 9.77 KB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

msaqibkamran/Digital-Smart-Lock-Room

Digital Smart Lock Room to automate six lights and a lock of a room.

Size: 25.4 KB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

loypt/digitalLogicWithLogisim

digital Logic experiment use Logisim Evolution

Size: 13.7 KB - Last synced at: about 1 year ago - Pushed at: about 4 years ago - Stars: 0 - Forks: 0

box-lin/verilogprojects

Projects for the Digital Logic Course EE214 at WSU

Language: HTML - Size: 38.2 MB - Last synced at: over 1 year ago - Pushed at: about 4 years ago - Stars: 0 - Forks: 0

Omar-Radwan/8x8-LED-Matrix

8x8 LED Matrix built using MAX7219 modules and arduino.

Language: C++ - Size: 9.55 MB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 3

lentinip/ManhattanDistance

Final examination of Digital Logic Design course (Reti Logiche) - A.Y. 2018/2019 Politecnico di Milano

Language: VHDL - Size: 680 KB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 0 - Forks: 0

mustafahakkoz/18bits_-processor

Processor design on Logisim

Language: Java - Size: 1010 KB - Last synced at: about 2 months ago - Pushed at: about 5 years ago - Stars: 0 - Forks: 2

HKhademian/SimpleMachine

implementation of a machine executes simple operations in general built-in registers in Verilog

Language: Verilog - Size: 749 KB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 0

ntuifranklin/ENES-246

Language: JavaScript - Size: 3.52 MB - Last synced at: about 1 year ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0

RayWHL/digital-logic

digital-logic

Language: Verilog - Size: 10.7 KB - Last synced at: over 1 year ago - Pushed at: over 6 years ago - Stars: 0 - Forks: 0

nazaninsbr/Hardware-Design

Language: Verilog - Size: 1.99 MB - Last synced at: about 2 years ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 0

SiluPanda/DLD-final-project

This is the final project for course Digital logic design which is a combination of encryptor, state machines and implementation on Atlys.

Language: VHDL - Size: 23.4 KB - Last synced at: over 1 year ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 0

SiluPanda/Interconnected-finite-state-machines

Simple design of interconnected state machines.

Language: VHDL - Size: 2.93 KB - Last synced at: over 1 year ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 0

SiluPanda/finite-state-machine

This is simple design of finite state machines in Digital Logic Design using VHDL.

Language: VHDL - Size: 6.84 KB - Last synced at: over 1 year ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 1

yash98/col215_lab

COL215 Lab work

Language: VHDL - Size: 767 KB - Last synced at: about 2 years ago - Pushed at: over 7 years ago - Stars: 0 - Forks: 0