GitHub topics: ring-oscillator
stnolting/neoTRNG
🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
Language: VHDL - Size: 662 KB - Last synced at: 10 days ago - Pushed at: 3 months ago - Stars: 182 - Forks: 22

litneet64/tt07-RO-based-PUF Fork of TinyTapeout/tt07-verilog-template
Implementation of a Ring Oscillator-based Physically Unclonable Function (PUF) in Sky130, with 8 bits of Challenge-Response Pairs (CRP)
Language: Verilog - Size: 330 KB - Last synced at: 10 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0

FarshidKeivanian/Minimization-of-Average-Power-Consumption-in-3-Stage-CMOS-Ring-Oscillator-based-on-MSFLA-Fuzzy-MSFL
FuzzyMSFLA-Algorithm (Fuzzy adaptive optimisation method)
Language: MATLAB - Size: 815 KB - Last synced at: about 1 year ago - Pushed at: almost 3 years ago - Stars: 1 - Forks: 2

Crimsonninja/senior_design_puf
Repository to store all design and testbench files for Senior Design
Language: Verilog - Size: 1.57 MB - Last synced at: over 1 year ago - Pushed at: about 5 years ago - Stars: 13 - Forks: 6

AlirezaShamsoshoara/Password-Manager-PUF-Ring-Oscillator
Ring oscillator and its application as Physical Unclonable Function (PUF) for password management
Language: MATLAB - Size: 3.55 MB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 3 - Forks: 4

maciejskorski/autocorrelations_trng
Study of deep correlations in (pseudo) random bits.
Language: Jupyter Notebook - Size: 56.8 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 1

bimalka98/Ring-Oscillator-and-PLD Fork of OshanJayawardana/Ring-Oscillator-and-PLD 📦
All the source files related to the design and simulation of a Ring Oscillator and a Programmable Logic Device(PLD) using the LTSpice XVII simulator for UOM's EN2110 - Electronics - III Module ❄
Language: AGS Script - Size: 91.9 MB - Last synced at: about 1 year ago - Pushed at: almost 4 years ago - Stars: 1 - Forks: 0

farshad112/ring_oscilator
Parameterized Ring Oscillator and Testbench. The design is written in Verilog and testbench is developed in SystemVerilog.
Language: SystemVerilog - Size: 40 KB - Last synced at: about 2 years ago - Pushed at: over 6 years ago - Stars: 3 - Forks: 2

aelfimow/ring-oscillator
Ring oscillator subcircuits
Size: 345 KB - Last synced at: almost 2 years ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 0
