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GitHub topics: bluespec

yuyuranium/bluespec-cmake

CMake modules for building Bluespec targets

Language: CMake - Size: 78.1 KB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 5 - Forks: 1

kammoh/bluelight

Hardware implementation of Lightweight Cryptography candidates in Bluespec SystemVerilog.

Language: C - Size: 1.13 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 5 - Forks: 1

mit-plv/kami

A Platform for High-Level Parametric Hardware Specification and its Modular Verification

Language: Rocq Prover - Size: 4.2 MB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 155 - Forks: 27

p4fpga/p4fpga

P4-14/16 Bluespec Compiler

Language: Bluespec - Size: 9.85 MB - Last synced at: 6 days ago - Pushed at: over 7 years ago - Stars: 87 - Forks: 28

chipsalliance/OmnixtendEndpoint

Hardware implementation of an OmniXtend Memory Endpoint/Lowest Point of Coherence.

Language: Bluespec - Size: 262 KB - Last synced at: about 1 month ago - Pushed at: 4 months ago - Stars: 18 - Forks: 5

JoyenBenitto/flame_thrower

Flame thrower is a on-chip network router written in bluespec system verilog

Language: Bluespec - Size: 78.1 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 2 - Forks: 2

thotypous/alterajtaguart

Altera JTAG UART wrapper for Bluespec

Language: C - Size: 137 KB - Last synced at: about 2 months ago - Pushed at: over 11 years ago - Stars: 25 - Forks: 11

WangXuan95/BSV_Tutorial_cn

一篇全面的 Bluespec SystemVerilog (BSV) 中文教程,介绍了BSV的调度、FIFO数据流、多态等高级特性,展示了BSV相比于传统Verilog开发的优势。

Language: Bluespec - Size: 31.1 MB - Last synced at: 5 months ago - Pushed at: almost 2 years ago - Stars: 566 - Forks: 44

cambridgehackers/connectal

Connectal is a framework for software-driven hardware development.

Language: Bluespec - Size: 13.9 MB - Last synced at: 5 months ago - Pushed at: almost 2 years ago - Stars: 168 - Forks: 50

thoughtpolice/yosys-bluespec

Yosys plugin for synthesis of Bluespec code

Language: C++ - Size: 87.9 KB - Last synced at: 5 months ago - Pushed at: almost 4 years ago - Stars: 15 - Forks: 0

Raamakrishnan/bsv-for-vscode

Bluespec System Verilog language extension for Visual Studio Code

Language: Bluespec - Size: 12.7 KB - Last synced at: 23 days ago - Pushed at: over 7 years ago - Stars: 10 - Forks: 0

seanpm2001/SNU_2D_ProgrammingTools_IDE_BlueSpec

⌨️ The BlueSpec programming language IDE submodule for SNU Programming Tools (2D Mode)

Language: Bluespec - Size: 267 KB - Last synced at: 7 days ago - Pushed at: 11 months ago - Stars: 1 - Forks: 0

seanpm2001/Learn-BlueSpec

📚️ A repository for showcasing my knowledge of the BlueSpec programming language, and continuing to learn the language.

Language: Bluespec - Size: 258 KB - Last synced at: 7 days ago - Pushed at: 11 months ago - Stars: 1 - Forks: 0

0xch4/blue-ice-breaker

Learning Bluespec on an iCEBreaker FPGA

Language: Bluespec - Size: 12.7 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

CTSRD-CHERI/RVBS

RISC-V BSV Specification

Language: Bluespec - Size: 429 KB - Last synced at: over 1 year ago - Pushed at: over 5 years ago - Stars: 17 - Forks: 2

thotypous/AcqSys

Low-cost modular acquisition and stimulation system for neuroscience

Language: Bluespec - Size: 140 KB - Last synced at: about 1 month ago - Pushed at: over 10 years ago - Stars: 1 - Forks: 1

megabyde/bsv-listings

Bluespec SystemVerilog language definition for the LaTeX listings package

Language: TeX - Size: 4.88 KB - Last synced at: over 1 year ago - Pushed at: over 8 years ago - Stars: 3 - Forks: 0

hce/blueook

Ook!-interpreter in Bluespec System Verilog

Language: Bluespec - Size: 9.77 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

thotypous/simple-mips

Simple MIPS µC for educational purposes

Language: C - Size: 414 KB - Last synced at: 5 months ago - Pushed at: over 11 years ago - Stars: 7 - Forks: 0

johnmaxrin/AF754

A collection of activation functions implemented in Bluespec for integration with hardware designs, ensuring IEEE 754 compliance

Language: Verilog - Size: 262 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

mchanphilly/vscode-bsv

Bluespec SystemVerilog extension for VS Code

Language: Bluespec - Size: 25.7 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 5 - Forks: 0

Sooryakiran/Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project

Domain Specific Hardware Accelerators - VLSI CAD Project

Language: Bluespec - Size: 4.59 MB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 6 - Forks: 2

GnosGnas/Side-Channel-Analysis

Repository for various experiments done during Aug'21 to Mar'21 related to Side-channel-analysis of Shakti's AES accelerators

Language: Verilog - Size: 334 MB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 3 - Forks: 1

xushengj/BluespecSystemVerilog-NotepadPlusPlus

Bluespec System Verilog syntax highlighting for Notepad++

Size: 26.4 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 1 - Forks: 1

jaytlang/risc-y

Six stage RISC-V processor supporting the RV32I instruction set

Language: C - Size: 154 KB - Last synced at: about 2 years ago - Pushed at: over 6 years ago - Stars: 2 - Forks: 2

thotypous/keccak-bsv

Bluespec SystemVerilog implementation of the Keccak primitive (SHA-3)

Language: Bluespec - Size: 210 KB - Last synced at: 3 months ago - Pushed at: over 9 years ago - Stars: 2 - Forks: 2

pbing/J1_BSV

Forth CPU J1 in Bluespec SystemVerilog (BSV)

Language: Verilog - Size: 294 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 3 - Forks: 0

cambridgehackers/bsvtokami

Translates Bluespec SystemVerilog to Kami for use with the coq proof assistant.

Language: Python - Size: 1.93 MB - Last synced at: over 2 years ago - Pushed at: almost 4 years ago - Stars: 6 - Forks: 3

pbing/Wishbone_BSV

Wishbone/Bluespec Systemverilog Transactors

Language: Verilog - Size: 958 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

pbing/fsm_bsv

FSM coding styles in BSV

Language: Verilog - Size: 15.6 KB - Last synced at: over 2 years ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

jsburke/bsv-cores

RISC-V cores based on Bluespec's Piccolo and Flute

Language: Python - Size: 133 KB - Last synced at: over 2 years ago - Pushed at: about 5 years ago - Stars: 1 - Forks: 1

jsburke/rv-bitmanip

Implementation of proposed RISC-V xbitmanip instructions in BlueSpec

Language: Bluespec - Size: 175 KB - Last synced at: over 2 years ago - Pushed at: over 6 years ago - Stars: 2 - Forks: 0

thotypous/altsourceprobe

Altera JTAG Source/Probe wrapper for Bluespec

Language: Tcl - Size: 246 KB - Last synced at: 6 months ago - Pushed at: over 11 years ago - Stars: 6 - Forks: 1

mhrtmnn/BSpartan

Collection of projects using Verilog and Bluespec on the Spartan Edge Accelerator FPGA Board

Language: Bluespec - Size: 8.19 MB - Last synced at: over 1 year ago - Pushed at: almost 5 years ago - Stars: 2 - Forks: 3

Micky261/Notepad-Plus-Plus-BlueSpec-Verilog-Syntax-Highlighting

BlueSpec Verilog Syntax Highlighting for Notepad++

Size: 5.86 KB - Last synced at: over 2 years ago - Pushed at: almost 7 years ago - Stars: 0 - Forks: 1

MarcosFagli/Redes_ImplementacaoTCPServer

Implementação do protocolo TCP para a disciplina de Redes de Computadores da Universidade Federal de São Carlos - UFSCar

Language: C++ - Size: 503 KB - Last synced at: about 2 years ago - Pushed at: almost 7 years ago - Stars: 1 - Forks: 0

DevJPM/BSV-Stuff

To toy around with Bluespec-SystemVerilog and my Basys3 board

Language: Bluespec - Size: 78.1 KB - Last synced at: over 2 years ago - Pushed at: over 7 years ago - Stars: 1 - Forks: 0