GitHub topics: vhdl-code
hussainmansour/4-bit-BCD-Counter
implementation of 4-bit BCD up/down counter. The counter work as follows: ● If input X = 0, the counter counts up. Otherwise, it counts down. ● If counting up, the counter’s value should be: 0000, 0001, 0010... ● If counting down: 0010, 0001, 0000...
Language: VHDL - Size: 15.6 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

pedrovivaldi/washing_machine
Washing machine program using VHDL
Language: VHDL - Size: 5 MB - Last synced at: over 2 years ago - Pushed at: over 7 years ago - Stars: 1 - Forks: 0

minji-o-j/Device-Programming
[Spring Semester 2020] Device Programming
Language: VHDL - Size: 98.6 KB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0

andrevale99/CD_ELE2715
Language: VHDL - Size: 533 KB - Last synced at: over 2 years ago - Pushed at: almost 3 years ago - Stars: 1 - Forks: 0

torland-klev/INF3430-Projects 📦
Language: VHDL - Size: 51 MB - Last synced at: over 1 year ago - Pushed at: over 5 years ago - Stars: 1 - Forks: 0

hungrymonkey/i2c
1:1 i2c device written in VHDL
Language: VHDL - Size: 22.7 MB - Last synced at: about 2 years ago - Pushed at: about 4 years ago - Stars: 1 - Forks: 0

santosfilho/RISC-V-RV32I
Projeto de microprocessador utilizando o conjunto de instruções RV32I
Language: VHDL - Size: 4.65 MB - Last synced at: over 2 years ago - Pushed at: over 5 years ago - Stars: 1 - Forks: 0

AndreaNeti/Progetto-Reti-Logiche-2022
Prova Finale di Reti Logiche - Polimi Ingegneria Informatica - a.a. 2021-2022
Language: VHDL - Size: 835 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

nazaninsbr/Neural-Network
Neural Network with VHDL and matlab
Language: C - Size: 18.9 MB - Last synced at: over 2 years ago - Pushed at: almost 7 years ago - Stars: 7 - Forks: 3

s-gbz/VHDL-exercises-examples
Code examples from the Technical Computer Science (Technische Informatik) module.
Language: VHDL - Size: 3.12 MB - Last synced at: over 2 years ago - Pushed at: about 4 years ago - Stars: 7 - Forks: 1

akaeba/generic_spi_master
Customizable multi chip select supporting Serial Peripheral Interface master.
Language: VHDL - Size: 729 KB - Last synced at: over 2 years ago - Pushed at: almost 4 years ago - Stars: 10 - Forks: 0

arasgungore/VGA-based-screensaver Fork of aybaras/VGA-based-screensaver
A VHDL-based VGA driver to implement a square 41x41 screensaver that cycles through 256 different colors.
Language: VHDL - Size: 494 KB - Last synced at: over 2 years ago - Pushed at: almost 3 years ago - Stars: 12 - Forks: 0

Kanishk-K-U/ALU
Design of an arithmetic logic (ALU). It typically performs mathematical and logical functions. An ALU is designed and implemented using VHDL.
Language: VHDL - Size: 790 KB - Last synced at: over 2 years ago - Pushed at: almost 3 years ago - Stars: 1 - Forks: 1

JulyWitch/vhdl_ghdl_examples
Simple VHDL examples using ghdl as compiler and wave generating
Language: VHDL - Size: 396 KB - Last synced at: about 2 years ago - Pushed at: almost 3 years ago - Stars: 9 - Forks: 0

mcagriaksoy/VHDL-FPGA-LAB_PROJECTS
My Lab Assigments from Bachelor Degree, This repo includes the projects for digital systems II Lecture (EEM334)
Language: VHDL - Size: 575 KB - Last synced at: over 2 years ago - Pushed at: about 5 years ago - Stars: 14 - Forks: 2

akgokce/dungeon-escape-vhdl-game
Dungeon Escape VHDL Game
Language: VHDL - Size: 91.8 KB - Last synced at: over 2 years ago - Pushed at: about 7 years ago - Stars: 5 - Forks: 0

LeHack/SPSP
Particulate matter pollution monitoring system (:poland: System Pomiaru Stężenia Pyłu w powietrzu)
Language: VHDL - Size: 5.52 MB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 3 - Forks: 1

chclau/vhdl_arbiter
VHDL arbiter. Fixed witdh, fixed priority
Language: VHDL - Size: 21.5 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

chclau/basys3_Magellan
Magellan - A HW monitor/debugger for Basys 3
Language: VHDL - Size: 375 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

ariannagavioli/PNG
A Pseudo-Random Noise Sequence Generator VHDL implementation to synthesize on a Zync FPGA for the Digital Systems Design course of University of Pisa, 2019.
Language: VHDL - Size: 661 KB - Last synced at: over 2 years ago - Pushed at: almost 6 years ago - Stars: 3 - Forks: 0

manish-9245/VHDL-Programs
This repository contains VHDL files of different Digital Designs.
Language: VHDL - Size: 4.49 MB - Last synced at: over 2 years ago - Pushed at: almost 4 years ago - Stars: 4 - Forks: 0

Sukhendu2002/coa-lab-vhdl-codes
Here you can find verious VHDL code with test banch
Language: VHDL - Size: 357 KB - Last synced at: about 1 year ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 1

jagumiel/irReceiver
Remote control infrared signal receiver programmed in VHDL for a Terasic DE1-SoC board.
Language: VHDL - Size: 7.55 MB - Last synced at: almost 2 years ago - Pushed at: about 3 years ago - Stars: 3 - Forks: 3

rajsinghtech/MIPS-Single-Cycle-Processor
CPRE 381 Project 1 - Single Cycle Processor
Language: HTML - Size: 130 MB - Last synced at: over 2 years ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0

ZiliottoFilippoDev/FIR-Filter-VHDL-Implementation Fork of micheleavella/fir_filter_VHDL
FPGA implementation via VHDL and Python simultation for a low-pass FIR Filter. Testbenches before the implmentation are also available.
Language: Jupyter Notebook - Size: 1.52 MB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0

DanielSouzaBertoldi/vhdl
Este projeto foi feito para a disciplina de Laboratório de Arquitetura de Computadores, e tem como objetivo implementar um MIPS simplificado utilizando-se da linguagem VHDL. As instruções implementadas para o microprocessador são: ADD, ADDI, SUB, LW, SW, BEQ, BNE, JAL, J, SLT, AND, OR, JR, SLL, SRL
Language: VHDL - Size: 5.28 MB - Last synced at: about 1 year ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 1

Ayush9719/Cache-Simulation-in-VHDL
This consists of a simulation of direct mapping in cache using VHDL
Language: VHDL - Size: 661 KB - Last synced at: over 2 years ago - Pushed at: almost 7 years ago - Stars: 1 - Forks: 0

zrajani/Fundamentals-of-Digital-Design-Using-VHDL
VHDL Codes to Implement Concepts of Digital Electronics
Language: VHDL - Size: 316 KB - Last synced at: over 2 years ago - Pushed at: about 5 years ago - Stars: 2 - Forks: 0

micro-FPGA/meM
micro embedded Matrix
Language: VHDL - Size: 51.8 KB - Last synced at: over 2 years ago - Pushed at: over 6 years ago - Stars: 4 - Forks: 2

ckevar/IIR-Filter
IIR Filter for audio application
Language: VHDL - Size: 10.7 KB - Last synced at: over 2 years ago - Pushed at: about 6 years ago - Stars: 1 - Forks: 4

nickdpz/Procesador-para-resolver-sistemas-matriciales
Este proyecto consta de un procesador dedicado para resolver sistemas matriciales de 3x3.Se ingresan los datos por medio de tecla con comunicacion serial ya que esta el diseño de los driver. La visualizarcion de los resultados con dos decimales de exactitud, Se visualiza los resultados finales en los leds de una FPGA, con posibilidades de visualizacion en una LCD.
Language: VHDL - Size: 650 KB - Last synced at: over 2 years ago - Pushed at: about 5 years ago - Stars: 0 - Forks: 0

losfroger/timer-vhdl
Temporizador hecho con vhdl
Language: VHDL - Size: 12.7 KB - Last synced at: 8 days ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 1

pedruino/playground-vhdl
Learning VHDL
Language: VHDL - Size: 8.79 KB - Last synced at: 4 months ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0

AbrahamPrez25/not-a-donkey-kong
Trabajo para Complementos de electrónica
Language: VHDL - Size: 42 KB - Last synced at: 7 months ago - Pushed at: over 6 years ago - Stars: 0 - Forks: 0

alejandromdnsls/ESCOMips
Language: C - Size: 1.34 MB - Last synced at: over 2 years ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 0
